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1 ; This tests the optimization of atomic cmpxchg w/ following cmp + branches. | 1 ; This tests the optimization of atomic cmpxchg w/ following cmp + branches. |
2 | 2 |
3 ; RUN: %p2i -i %s --args -O2 --verbose none \ | 3 ; RUN: %p2i -i %s --assemble --disassemble --args -O2 --verbose none \ |
jvoung (off chromium)
2015/02/13 23:37:23
Maybe this should pass the architecture flag to th
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4 ; RUN: | llvm-mc -triple=i686-none-nacl -filetype=obj \ | |
5 ; RUN: | llvm-objdump -d -symbolize -x86-asm-syntax=intel - \ | |
6 ; RUN: | FileCheck --check-prefix=O2 %s | 4 ; RUN: | FileCheck --check-prefix=O2 %s |
7 ; RUN: %p2i -i %s --args -Om1 --verbose none \ | 5 ; RUN: %p2i -i %s --assemble --disassemble --args -Om1 --verbose none \ |
8 ; RUN: | llvm-mc -triple=i686-none-nacl -filetype=obj \ | |
9 ; RUN: | llvm-objdump -d -symbolize -x86-asm-syntax=intel - \ | |
10 ; RUN: | FileCheck --check-prefix=OM1 %s | 6 ; RUN: | FileCheck --check-prefix=OM1 %s |
11 | 7 |
12 declare i32 @llvm.nacl.atomic.cmpxchg.i32(i32*, i32, i32, i32, i32) | 8 declare i32 @llvm.nacl.atomic.cmpxchg.i32(i32*, i32, i32, i32, i32) |
13 | 9 |
14 | 10 |
15 ; Test that a cmpxchg followed by icmp eq and branch can be optimized to | 11 ; Test that a cmpxchg followed by icmp eq and branch can be optimized to |
16 ; reuse the flags set by the cmpxchg instruction itself. | 12 ; reuse the flags set by the cmpxchg instruction itself. |
17 ; This is only expected to work w/ O2, based on lightweight liveness. | 13 ; This is only expected to work w/ O2, based on lightweight liveness. |
18 ; (Or if we had other means to detect the only use). | 14 ; (Or if we had other means to detect the only use). |
19 declare void @use_value(i32) | 15 declare void @use_value(i32) |
(...skipping 10 matching lines...) Expand all Loading... | |
30 i32 %desired, i32 6, i32 6) | 26 i32 %desired, i32 6, i32 6) |
31 %success = icmp eq i32 %expected_loop, %old | 27 %success = icmp eq i32 %expected_loop, %old |
32 br i1 %success, label %done, label %loop | 28 br i1 %success, label %done, label %loop |
33 | 29 |
34 done: | 30 done: |
35 call void @use_value(i32 %old) | 31 call void @use_value(i32 %old) |
36 ret i32 %succeeded_first_try | 32 ret i32 %succeeded_first_try |
37 } | 33 } |
38 ; O2-LABEL: test_atomic_cmpxchg_loop | 34 ; O2-LABEL: test_atomic_cmpxchg_loop |
39 ; O2: lock | 35 ; O2: lock |
40 ; O2-NEXT: cmpxchg dword ptr [e{{[^a].}}], e{{[^a]}} | 36 ; O2-NEXT: cmpxchg DWORD PTR [e{{[^a].}}], e{{[^a]}} |
41 ; O2-NEXT: j{{e|ne}} | 37 ; O2-NEXT: j{{e|ne}} |
42 ; Make sure the call isn't accidentally deleted. | 38 ; Make sure the call isn't accidentally deleted. |
43 ; O2: call | 39 ; O2: call |
44 ; | 40 ; |
45 ; Check that the unopt version does have a cmp | 41 ; Check that the unopt version does have a cmp |
46 ; OM1-LABEL: test_atomic_cmpxchg_loop | 42 ; OM1-LABEL: test_atomic_cmpxchg_loop |
47 ; OM1: lock | 43 ; OM1: lock |
48 ; OM1-NEXT: cmpxchg dword ptr [e{{[^a].}}], e{{[^a]}} | 44 ; OM1-NEXT: cmpxchg DWORD PTR [e{{[^a].}}], e{{[^a]}} |
49 ; OM1: cmp | 45 ; OM1: cmp |
50 ; OM1: je | 46 ; OM1: je |
51 ; OM1: call | 47 ; OM1: call |
52 | 48 |
53 ; Still works if the compare operands are flipped. | 49 ; Still works if the compare operands are flipped. |
54 define i32 @test_atomic_cmpxchg_loop2(i32 %iptr, i32 %expected, i32 %desired) { | 50 define i32 @test_atomic_cmpxchg_loop2(i32 %iptr, i32 %expected, i32 %desired) { |
55 entry: | 51 entry: |
56 br label %loop | 52 br label %loop |
57 | 53 |
58 loop: | 54 loop: |
59 %expected_loop = phi i32 [ %expected, %entry ], [ %old, %loop ] | 55 %expected_loop = phi i32 [ %expected, %entry ], [ %old, %loop ] |
60 %ptr = inttoptr i32 %iptr to i32* | 56 %ptr = inttoptr i32 %iptr to i32* |
61 %old = call i32 @llvm.nacl.atomic.cmpxchg.i32(i32* %ptr, i32 %expected_loop, | 57 %old = call i32 @llvm.nacl.atomic.cmpxchg.i32(i32* %ptr, i32 %expected_loop, |
62 i32 %desired, i32 6, i32 6) | 58 i32 %desired, i32 6, i32 6) |
63 %success = icmp eq i32 %old, %expected_loop | 59 %success = icmp eq i32 %old, %expected_loop |
64 br i1 %success, label %done, label %loop | 60 br i1 %success, label %done, label %loop |
65 | 61 |
66 done: | 62 done: |
67 ret i32 %old | 63 ret i32 %old |
68 } | 64 } |
69 ; O2-LABEL: test_atomic_cmpxchg_loop2 | 65 ; O2-LABEL: test_atomic_cmpxchg_loop2 |
70 ; O2: lock | 66 ; O2: lock |
71 ; O2-NEXT: cmpxchg dword ptr [e{{[^a].}}], e{{[^a]}} | 67 ; O2-NEXT: cmpxchg DWORD PTR [e{{[^a].}}], e{{[^a]}} |
72 ; O2-NOT: cmp | 68 ; O2-NOT: cmp |
73 ; O2: jne | 69 ; O2: jne |
74 | 70 |
75 | 71 |
76 ; Still works if the compare operands are constants. | 72 ; Still works if the compare operands are constants. |
77 define i32 @test_atomic_cmpxchg_loop_const(i32 %iptr, i32 %desired) { | 73 define i32 @test_atomic_cmpxchg_loop_const(i32 %iptr, i32 %desired) { |
78 entry: | 74 entry: |
79 br label %loop | 75 br label %loop |
80 | 76 |
81 loop: | 77 loop: |
82 %succeeded_first_try = phi i32 [ 1, %entry ], [ 0, %loop ] | 78 %succeeded_first_try = phi i32 [ 1, %entry ], [ 0, %loop ] |
83 %ptr = inttoptr i32 %iptr to i32* | 79 %ptr = inttoptr i32 %iptr to i32* |
84 %old = call i32 @llvm.nacl.atomic.cmpxchg.i32(i32* %ptr, i32 0, | 80 %old = call i32 @llvm.nacl.atomic.cmpxchg.i32(i32* %ptr, i32 0, |
85 i32 %desired, i32 6, i32 6) | 81 i32 %desired, i32 6, i32 6) |
86 %success = icmp eq i32 %old, 0 | 82 %success = icmp eq i32 %old, 0 |
87 br i1 %success, label %done, label %loop | 83 br i1 %success, label %done, label %loop |
88 | 84 |
89 done: | 85 done: |
90 ret i32 %succeeded_first_try | 86 ret i32 %succeeded_first_try |
91 } | 87 } |
92 ; O2-LABEL: test_atomic_cmpxchg_loop_const | 88 ; O2-LABEL: test_atomic_cmpxchg_loop_const |
93 ; O2: lock | 89 ; O2: lock |
94 ; O2-NEXT: cmpxchg dword ptr [e{{[^a].}}], e{{[^a]}} | 90 ; O2-NEXT: cmpxchg DWORD PTR [e{{[^a].}}], e{{[^a]}} |
95 ; O2-NEXT: j{{e|ne}} | 91 ; O2-NEXT: j{{e|ne}} |
96 | 92 |
97 ; This is a case where the flags cannot be reused (compare is for some | 93 ; This is a case where the flags cannot be reused (compare is for some |
98 ; other condition). | 94 ; other condition). |
99 define i32 @test_atomic_cmpxchg_no_opt(i32 %iptr, i32 %expected, i32 %desired) { | 95 define i32 @test_atomic_cmpxchg_no_opt(i32 %iptr, i32 %expected, i32 %desired) { |
100 entry: | 96 entry: |
101 br label %loop | 97 br label %loop |
102 | 98 |
103 loop: | 99 loop: |
104 %expected_loop = phi i32 [ %expected, %entry ], [ %old, %loop ] | 100 %expected_loop = phi i32 [ %expected, %entry ], [ %old, %loop ] |
105 %ptr = inttoptr i32 %iptr to i32* | 101 %ptr = inttoptr i32 %iptr to i32* |
106 %old = call i32 @llvm.nacl.atomic.cmpxchg.i32(i32* %ptr, i32 %expected_loop, | 102 %old = call i32 @llvm.nacl.atomic.cmpxchg.i32(i32* %ptr, i32 %expected_loop, |
107 i32 %desired, i32 6, i32 6) | 103 i32 %desired, i32 6, i32 6) |
108 %success = icmp sgt i32 %old, %expected | 104 %success = icmp sgt i32 %old, %expected |
109 br i1 %success, label %done, label %loop | 105 br i1 %success, label %done, label %loop |
110 | 106 |
111 done: | 107 done: |
112 ret i32 %old | 108 ret i32 %old |
113 } | 109 } |
114 ; O2-LABEL: test_atomic_cmpxchg_no_opt | 110 ; O2-LABEL: test_atomic_cmpxchg_no_opt |
115 ; O2: lock | 111 ; O2: lock |
116 ; O2-NEXT: cmpxchg dword ptr [e{{[^a].}}], e{{[^a]}} | 112 ; O2-NEXT: cmpxchg DWORD PTR [e{{[^a].}}], e{{[^a]}} |
117 ; O2: cmp | 113 ; O2: cmp |
118 ; O2: jle | 114 ; O2: jle |
119 | 115 |
120 ; Another case where the flags cannot be reused (the comparison result | 116 ; Another case where the flags cannot be reused (the comparison result |
121 ; is used somewhere else). | 117 ; is used somewhere else). |
122 define i32 @test_atomic_cmpxchg_no_opt2(i32 %iptr, i32 %expected, i32 %desired) { | 118 define i32 @test_atomic_cmpxchg_no_opt2(i32 %iptr, i32 %expected, i32 %desired) { |
123 entry: | 119 entry: |
124 br label %loop | 120 br label %loop |
125 | 121 |
126 loop: | 122 loop: |
127 %expected_loop = phi i32 [ %expected, %entry ], [ %old, %loop ] | 123 %expected_loop = phi i32 [ %expected, %entry ], [ %old, %loop ] |
128 %ptr = inttoptr i32 %iptr to i32* | 124 %ptr = inttoptr i32 %iptr to i32* |
129 %old = call i32 @llvm.nacl.atomic.cmpxchg.i32(i32* %ptr, i32 %expected_loop, | 125 %old = call i32 @llvm.nacl.atomic.cmpxchg.i32(i32* %ptr, i32 %expected_loop, |
130 i32 %desired, i32 6, i32 6) | 126 i32 %desired, i32 6, i32 6) |
131 %success = icmp eq i32 %old, %expected | 127 %success = icmp eq i32 %old, %expected |
132 br i1 %success, label %done, label %loop | 128 br i1 %success, label %done, label %loop |
133 | 129 |
134 done: | 130 done: |
135 %r = zext i1 %success to i32 | 131 %r = zext i1 %success to i32 |
136 ret i32 %r | 132 ret i32 %r |
137 } | 133 } |
138 ; O2-LABEL: test_atomic_cmpxchg_no_opt2 | 134 ; O2-LABEL: test_atomic_cmpxchg_no_opt2 |
139 ; O2: lock | 135 ; O2: lock |
140 ; O2-NEXT: cmpxchg dword ptr [e{{[^a].}}], e{{[^a]}} | 136 ; O2-NEXT: cmpxchg DWORD PTR [e{{[^a].}}], e{{[^a]}} |
141 ; O2: mov {{.*}} | 137 ; O2: mov {{.*}} |
142 ; O2: cmp | 138 ; O2: cmp |
143 ; O2: je | 139 ; O2: je |
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