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Unified Diff: src/x64/assembler-x64.cc

Issue 91333002: Refactor X64 movq assembler instruction (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 7 years ago
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Index: src/x64/assembler-x64.cc
diff --git a/src/x64/assembler-x64.cc b/src/x64/assembler-x64.cc
index 49bd78d1ffc9e52dde1dba42ef36f0cbe6734646..bc875d67e83c9336cefaa84019b2ff6909080b43 100644
--- a/src/x64/assembler-x64.cc
+++ b/src/x64/assembler-x64.cc
@@ -1395,89 +1395,56 @@ void Assembler::movw(const Operand& dst, Immediate imm) {
}
-void Assembler::movl(Register dst, const Operand& src) {
+void Assembler::emit_mov(Register dst, const Operand& src, int size) {
EnsureSpace ensure_space(this);
- emit_optional_rex_32(dst, src);
+ emit_rex(dst, src, size);
emit(0x8B);
emit_operand(dst, src);
}
-void Assembler::movl(Register dst, Register src) {
+void Assembler::emit_mov(Register dst, Register src, int size) {
EnsureSpace ensure_space(this);
if (src.low_bits() == 4) {
- emit_optional_rex_32(src, dst);
+ emit_rex(src, dst, size);
emit(0x89);
emit_modrm(src, dst);
} else {
- emit_optional_rex_32(dst, src);
+ emit_rex(dst, src, size);
emit(0x8B);
emit_modrm(dst, src);
}
}
-void Assembler::movl(const Operand& dst, Register src) {
+void Assembler::emit_mov(const Operand& dst, Register src, int size) {
EnsureSpace ensure_space(this);
- emit_optional_rex_32(src, dst);
+ emit_rex(src, dst, size);
emit(0x89);
emit_operand(src, dst);
}
-void Assembler::movl(const Operand& dst, Immediate value) {
- EnsureSpace ensure_space(this);
- emit_optional_rex_32(dst);
- emit(0xC7);
- emit_operand(0x0, dst);
- emit(value);
-}
-
-
-void Assembler::movl(Register dst, Immediate value) {
- EnsureSpace ensure_space(this);
- emit_optional_rex_32(dst);
- emit(0xB8 + dst.low_bits());
- emit(value);
-}
-
-
-void Assembler::movq(Register dst, const Operand& src) {
- EnsureSpace ensure_space(this);
- emit_rex_64(dst, src);
- emit(0x8B);
- emit_operand(dst, src);
-}
-
-
-void Assembler::movq(Register dst, Register src) {
+void Assembler::emit_mov(Register dst, Immediate value, int size) {
EnsureSpace ensure_space(this);
- if (src.low_bits() == 4) {
- emit_rex_64(src, dst);
- emit(0x89);
- emit_modrm(src, dst);
+ emit_rex(dst, size);
+ if (size == kInt64Size) {
+ emit(0xC7);
+ emit_modrm(0x0, dst);
} else {
- emit_rex_64(dst, src);
- emit(0x8B);
- emit_modrm(dst, src);
+ ASSERT(size == kInt32Size);
+ emit(0xB8 + dst.low_bits());
}
+ emit(value);
}
-void Assembler::movq(Register dst, Immediate value) {
+void Assembler::emit_mov(const Operand& dst, Immediate value, int size) {
EnsureSpace ensure_space(this);
- emit_rex_64(dst);
+ emit_rex(dst, size);
emit(0xC7);
- emit_modrm(0x0, dst);
- emit(value); // Only 32-bit immediates are possible, not 8-bit immediates.
-}
-
-
-void Assembler::movq(const Operand& dst, Register src) {
- EnsureSpace ensure_space(this);
- emit_rex_64(src, dst);
- emit(0x89);
- emit_operand(src, dst);
+ emit_operand(0x0, dst);
+ emit(value);
}
@@ -1504,12 +1471,8 @@ void Assembler::movq(Register dst, int64_t value) {
}
-void Assembler::movq(const Operand& dst, Immediate value) {
- EnsureSpace ensure_space(this);
- emit_rex_64(dst);
- emit(0xC7);
- emit_operand(0, dst);
- emit(value);
+void Assembler::movq(Register dst, uint64_t value) {
+ movq(dst, static_cast<int64_t>(value));
}
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