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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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1643 // The delta to the start of the map check instruction and the | 1643 // The delta to the start of the map check instruction and the |
1644 // condition code uses at the patched jump. | 1644 // condition code uses at the patched jump. |
1645 int delta = Assembler::GetImmediate16(instr); | 1645 int delta = Assembler::GetImmediate16(instr); |
1646 delta += Assembler::GetRs(instr) * kImm16Mask; | 1646 delta += Assembler::GetRs(instr) * kImm16Mask; |
1647 // If the delta is 0 the instruction is andi at, zero_reg, #0 which also | 1647 // If the delta is 0 the instruction is andi at, zero_reg, #0 which also |
1648 // signals that nothing was inlined. | 1648 // signals that nothing was inlined. |
1649 if (delta == 0) { | 1649 if (delta == 0) { |
1650 return; | 1650 return; |
1651 } | 1651 } |
1652 | 1652 |
1653 #ifdef DEBUG | |
1654 if (FLAG_trace_ic) { | 1653 if (FLAG_trace_ic) { |
1655 PrintF("[ patching ic at %p, andi=%p, delta=%d\n", | 1654 PrintF("[ patching ic at %p, andi=%p, delta=%d\n", |
1656 address, andi_instruction_address, delta); | 1655 address, andi_instruction_address, delta); |
1657 } | 1656 } |
1658 #endif | |
1659 | 1657 |
1660 Address patch_address = | 1658 Address patch_address = |
1661 andi_instruction_address - delta * Instruction::kInstrSize; | 1659 andi_instruction_address - delta * Instruction::kInstrSize; |
1662 Instr instr_at_patch = Assembler::instr_at(patch_address); | 1660 Instr instr_at_patch = Assembler::instr_at(patch_address); |
1663 Instr branch_instr = | 1661 Instr branch_instr = |
1664 Assembler::instr_at(patch_address + Instruction::kInstrSize); | 1662 Assembler::instr_at(patch_address + Instruction::kInstrSize); |
1665 // This is patching a conditional "jump if not smi/jump if smi" site. | 1663 // This is patching a conditional "jump if not smi/jump if smi" site. |
1666 // Enabling by changing from | 1664 // Enabling by changing from |
1667 // andi at, rx, 0 | 1665 // andi at, rx, 0 |
1668 // Branch <target>, eq, at, Operand(zero_reg) | 1666 // Branch <target>, eq, at, Operand(zero_reg) |
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1687 } else { | 1685 } else { |
1688 ASSERT(Assembler::IsBne(branch_instr)); | 1686 ASSERT(Assembler::IsBne(branch_instr)); |
1689 patcher.ChangeBranchCondition(eq); | 1687 patcher.ChangeBranchCondition(eq); |
1690 } | 1688 } |
1691 } | 1689 } |
1692 | 1690 |
1693 | 1691 |
1694 } } // namespace v8::internal | 1692 } } // namespace v8::internal |
1695 | 1693 |
1696 #endif // V8_TARGET_ARCH_MIPS | 1694 #endif // V8_TARGET_ARCH_MIPS |
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