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Side by Side Diff: runtime/vm/simulator_arm64.cc

Issue 909253002: Fix a windows build issue (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 5 years, 10 months ago
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1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include <setjmp.h> // NOLINT 5 #include <setjmp.h> // NOLINT
6 #include <stdlib.h> 6 #include <stdlib.h>
7 7
8 #include "vm/globals.h" 8 #include "vm/globals.h"
9 #if defined(TARGET_ARCH_ARM64) 9 #if defined(TARGET_ARCH_ARM64)
10 10
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191 return false; 191 return false;
192 } 192 }
193 *value = *(reinterpret_cast<int64_t*>(addr)); 193 *value = *(reinterpret_cast<int64_t*>(addr));
194 return true; 194 return true;
195 } 195 }
196 } 196 }
197 if (strcmp("pc", desc) == 0) { 197 if (strcmp("pc", desc) == 0) {
198 *value = sim_->get_pc(); 198 *value = sim_->get_pc();
199 return true; 199 return true;
200 } 200 }
201 bool retval = SScanF(desc, "0x%"Px64, value) == 1; 201 bool retval = SScanF(desc, "0x%" Px64, value) == 1;
202 if (!retval) { 202 if (!retval) {
203 retval = SScanF(desc, "%"Px64, value) == 1; 203 retval = SScanF(desc, "%" Px64, value) == 1;
204 } 204 }
205 return retval; 205 return retval;
206 } 206 }
207 207
208 208
209 bool SimulatorDebugger::GetSValue(char* desc, uint32_t* value) { 209 bool SimulatorDebugger::GetSValue(char* desc, uint32_t* value) {
210 VRegister vreg = LookupVRegisterByName(desc); 210 VRegister vreg = LookupVRegisterByName(desc);
211 if (vreg != kNoVRegister) { 211 if (vreg != kNoVRegister) {
212 *value = sim_->get_vregisters(vreg, 0); 212 *value = sim_->get_vregisters(vreg, 0);
213 return true; 213 return true;
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472 } else if ((strcmp(cmd, "c") == 0) || (strcmp(cmd, "cont") == 0)) { 472 } else if ((strcmp(cmd, "c") == 0) || (strcmp(cmd, "cont") == 0)) {
473 // Execute the one instruction we broke at with breakpoints disabled. 473 // Execute the one instruction we broke at with breakpoints disabled.
474 sim_->InstructionDecode(reinterpret_cast<Instr*>(sim_->get_pc())); 474 sim_->InstructionDecode(reinterpret_cast<Instr*>(sim_->get_pc()));
475 // Leave the debugger shell. 475 // Leave the debugger shell.
476 done = true; 476 done = true;
477 } else if ((strcmp(cmd, "p") == 0) || (strcmp(cmd, "print") == 0)) { 477 } else if ((strcmp(cmd, "p") == 0) || (strcmp(cmd, "print") == 0)) {
478 if (args == 2) { 478 if (args == 2) {
479 uint64_t value; 479 uint64_t value;
480 if (strcmp(arg1, "icount") == 0) { 480 if (strcmp(arg1, "icount") == 0) {
481 value = sim_->get_icount(); 481 value = sim_->get_icount();
482 OS::Print("icount: %"Pu64" 0x%"Px64"\n", value, value); 482 OS::Print("icount: %" Pu64 " 0x%" Px64 "\n", value, value);
483 } else if (GetValue(arg1, &value)) { 483 } else if (GetValue(arg1, &value)) {
484 OS::Print("%s: %"Pu64" 0x%"Px64"\n", arg1, value, value); 484 OS::Print("%s: %" Pu64 " 0x%" Px64 "\n", arg1, value, value);
485 } else { 485 } else {
486 OS::Print("%s unrecognized\n", arg1); 486 OS::Print("%s unrecognized\n", arg1);
487 } 487 }
488 } else { 488 } else {
489 OS::Print("print <reg or icount or value or *addr>\n"); 489 OS::Print("print <reg or icount or value or *addr>\n");
490 } 490 }
491 } else if ((strcmp(cmd, "pf") == 0) || 491 } else if ((strcmp(cmd, "pf") == 0) ||
492 (strcmp(cmd, "printfloat") == 0)) { 492 (strcmp(cmd, "printfloat") == 0)) {
493 if (args == 2) { 493 if (args == 2) {
494 uint32_t value; 494 uint32_t value;
495 if (GetSValue(arg1, &value)) { 495 if (GetSValue(arg1, &value)) {
496 float svalue = bit_cast<float, uint32_t>(value); 496 float svalue = bit_cast<float, uint32_t>(value);
497 OS::Print("%s: %d 0x%x %.8g\n", 497 OS::Print("%s: %d 0x%x %.8g\n",
498 arg1, value, value, svalue); 498 arg1, value, value, svalue);
499 } else { 499 } else {
500 OS::Print("%s unrecognized\n", arg1); 500 OS::Print("%s unrecognized\n", arg1);
501 } 501 }
502 } else { 502 } else {
503 OS::Print("printfloat <vreg or *addr>\n"); 503 OS::Print("printfloat <vreg or *addr>\n");
504 } 504 }
505 } else if ((strcmp(cmd, "pd") == 0) || 505 } else if ((strcmp(cmd, "pd") == 0) ||
506 (strcmp(cmd, "printdouble") == 0)) { 506 (strcmp(cmd, "printdouble") == 0)) {
507 if (args == 2) { 507 if (args == 2) {
508 uint64_t long_value; 508 uint64_t long_value;
509 if (GetDValue(arg1, &long_value)) { 509 if (GetDValue(arg1, &long_value)) {
510 double dvalue = bit_cast<double, uint64_t>(long_value); 510 double dvalue = bit_cast<double, uint64_t>(long_value);
511 OS::Print("%s: %"Pu64" 0x%"Px64" %.8g\n", 511 OS::Print("%s: %" Pu64 " 0x%" Px64 " %.8g\n",
512 arg1, long_value, long_value, dvalue); 512 arg1, long_value, long_value, dvalue);
513 } else { 513 } else {
514 OS::Print("%s unrecognized\n", arg1); 514 OS::Print("%s unrecognized\n", arg1);
515 } 515 }
516 } else { 516 } else {
517 OS::Print("printdouble <vreg or *addr>\n"); 517 OS::Print("printdouble <vreg or *addr>\n");
518 } 518 }
519 } else if ((strcmp(cmd, "pq") == 0) || 519 } else if ((strcmp(cmd, "pq") == 0) ||
520 (strcmp(cmd, "printquad") == 0)) { 520 (strcmp(cmd, "printquad") == 0)) {
521 if (args == 2) { 521 if (args == 2) {
522 simd_value_t quad_value; 522 simd_value_t quad_value;
523 if (GetQValue(arg1, &quad_value)) { 523 if (GetQValue(arg1, &quad_value)) {
524 const int64_t d0 = quad_value.bits.i64[0]; 524 const int64_t d0 = quad_value.bits.i64[0];
525 const int64_t d1 = quad_value.bits.i64[1]; 525 const int64_t d1 = quad_value.bits.i64[1];
526 const double dval0 = bit_cast<double, int64_t>(d0); 526 const double dval0 = bit_cast<double, int64_t>(d0);
527 const double dval1 = bit_cast<double, int64_t>(d1); 527 const double dval1 = bit_cast<double, int64_t>(d1);
528 const int32_t s0 = quad_value.bits.i32[0]; 528 const int32_t s0 = quad_value.bits.i32[0];
529 const int32_t s1 = quad_value.bits.i32[1]; 529 const int32_t s1 = quad_value.bits.i32[1];
530 const int32_t s2 = quad_value.bits.i32[2]; 530 const int32_t s2 = quad_value.bits.i32[2];
531 const int32_t s3 = quad_value.bits.i32[3]; 531 const int32_t s3 = quad_value.bits.i32[3];
532 const float sval0 = bit_cast<float, int32_t>(s0); 532 const float sval0 = bit_cast<float, int32_t>(s0);
533 const float sval1 = bit_cast<float, int32_t>(s1); 533 const float sval1 = bit_cast<float, int32_t>(s1);
534 const float sval2 = bit_cast<float, int32_t>(s2); 534 const float sval2 = bit_cast<float, int32_t>(s2);
535 const float sval3 = bit_cast<float, int32_t>(s3); 535 const float sval3 = bit_cast<float, int32_t>(s3);
536 OS::Print("%s: %"Pu64" 0x%"Px64" %.8g\n", arg1, d0, d0, dval0); 536 OS::Print("%s: %" Pu64 " 0x%" Px64 " %.8g\n", arg1, d0, d0, dval0);
537 OS::Print("%s: %"Pu64" 0x%"Px64" %.8g\n", arg1, d1, d1, dval1); 537 OS::Print("%s: %" Pu64 " 0x%" Px64 " %.8g\n", arg1, d1, d1, dval1);
538 OS::Print("%s: %d 0x%x %.8g\n", arg1, s0, s0, sval0); 538 OS::Print("%s: %d 0x%x %.8g\n", arg1, s0, s0, sval0);
539 OS::Print("%s: %d 0x%x %.8g\n", arg1, s1, s1, sval1); 539 OS::Print("%s: %d 0x%x %.8g\n", arg1, s1, s1, sval1);
540 OS::Print("%s: %d 0x%x %.8g\n", arg1, s2, s2, sval2); 540 OS::Print("%s: %d 0x%x %.8g\n", arg1, s2, s2, sval2);
541 OS::Print("%s: %d 0x%x %.8g\n", arg1, s3, s3, sval3); 541 OS::Print("%s: %d 0x%x %.8g\n", arg1, s3, s3, sval3);
542 } else { 542 } else {
543 OS::Print("%s unrecognized\n", arg1); 543 OS::Print("%s unrecognized\n", arg1);
544 } 544 }
545 } else { 545 } else {
546 OS::Print("printquad <vreg or *addr>\n"); 546 OS::Print("printquad <vreg or *addr>\n");
547 } 547 }
548 } else if ((strcmp(cmd, "po") == 0) || 548 } else if ((strcmp(cmd, "po") == 0) ||
549 (strcmp(cmd, "printobject") == 0)) { 549 (strcmp(cmd, "printobject") == 0)) {
550 if (args == 2) { 550 if (args == 2) {
551 uint64_t value; 551 uint64_t value;
552 // Make the dereferencing '*' optional. 552 // Make the dereferencing '*' optional.
553 if (((arg1[0] == '*') && GetValue(arg1 + 1, &value)) || 553 if (((arg1[0] == '*') && GetValue(arg1 + 1, &value)) ||
554 GetValue(arg1, &value)) { 554 GetValue(arg1, &value)) {
555 if (Isolate::Current()->heap()->Contains(value)) { 555 if (Isolate::Current()->heap()->Contains(value)) {
556 OS::Print("%s: \n", arg1); 556 OS::Print("%s: \n", arg1);
557 #if defined(DEBUG) 557 #if defined(DEBUG)
558 const Object& obj = Object::Handle( 558 const Object& obj = Object::Handle(
559 reinterpret_cast<RawObject*>(value)); 559 reinterpret_cast<RawObject*>(value));
560 obj.Print(); 560 obj.Print();
561 #endif // defined(DEBUG) 561 #endif // defined(DEBUG)
562 } else { 562 } else {
563 OS::Print("0x%"Px64" is not an object reference\n", value); 563 OS::Print("0x%" Px64 " is not an object reference\n", value);
564 } 564 }
565 } else { 565 } else {
566 OS::Print("%s unrecognized\n", arg1); 566 OS::Print("%s unrecognized\n", arg1);
567 } 567 }
568 } else { 568 } else {
569 OS::Print("printobject <*reg or *addr>\n"); 569 OS::Print("printobject <*reg or *addr>\n");
570 } 570 }
571 } else if (strcmp(cmd, "disasm") == 0) { 571 } else if (strcmp(cmd, "disasm") == 0) {
572 uint64_t start = 0; 572 uint64_t start = 0;
573 uint64_t end = 0; 573 uint64_t end = 0;
574 if (args == 1) { 574 if (args == 1) {
575 start = sim_->get_pc(); 575 start = sim_->get_pc();
576 end = start + (10 * Instr::kInstrSize); 576 end = start + (10 * Instr::kInstrSize);
577 } else if (args == 2) { 577 } else if (args == 2) {
578 if (GetValue(arg1, &start)) { 578 if (GetValue(arg1, &start)) {
579 // No length parameter passed, assume 10 instructions. 579 // No length parameter passed, assume 10 instructions.
580 if (Simulator::IsIllegalAddress(start)) { 580 if (Simulator::IsIllegalAddress(start)) {
581 // If start isn't a valid address, warn and use PC instead. 581 // If start isn't a valid address, warn and use PC instead.
582 OS::Print("First argument yields invalid address: 0x%"Px64"\n", 582 OS::Print("First argument yields invalid address: 0x%" Px64 "\n",
583 start); 583 start);
584 OS::Print("Using PC instead\n"); 584 OS::Print("Using PC instead\n");
585 start = sim_->get_pc(); 585 start = sim_->get_pc();
586 } 586 }
587 end = start + (10 * Instr::kInstrSize); 587 end = start + (10 * Instr::kInstrSize);
588 } 588 }
589 } else { 589 } else {
590 uint64_t length; 590 uint64_t length;
591 if (GetValue(arg1, &start) && GetValue(arg2, &length)) { 591 if (GetValue(arg1, &start) && GetValue(arg2, &length)) {
592 if (Simulator::IsIllegalAddress(start)) { 592 if (Simulator::IsIllegalAddress(start)) {
593 // If start isn't a valid address, warn and use PC instead. 593 // If start isn't a valid address, warn and use PC instead.
594 OS::Print("First argument yields invalid address: 0x%"Px64"\n", 594 OS::Print("First argument yields invalid address: 0x%" Px64 "\n",
595 start); 595 start);
596 OS::Print("Using PC instead\n"); 596 OS::Print("Using PC instead\n");
597 start = sim_->get_pc(); 597 start = sim_->get_pc();
598 } 598 }
599 end = start + (length * Instr::kInstrSize); 599 end = start + (length * Instr::kInstrSize);
600 } 600 }
601 } 601 }
602 if ((start > 0) && (end > start)) { 602 if ((start > 0) && (end > start)) {
603 Disassembler::Disassemble(start, end); 603 Disassembler::Disassemble(start, end);
604 } else { 604 } else {
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3296 } else { 3296 } else {
3297 UnimplementedInstruction(instr); 3297 UnimplementedInstruction(instr);
3298 } 3298 }
3299 } 3299 }
3300 3300
3301 3301
3302 // Executes the current instruction. 3302 // Executes the current instruction.
3303 void Simulator::InstructionDecode(Instr* instr) { 3303 void Simulator::InstructionDecode(Instr* instr) {
3304 pc_modified_ = false; 3304 pc_modified_ = false;
3305 if (IsTracingExecution()) { 3305 if (IsTracingExecution()) {
3306 OS::Print("%"Pu64, icount_); 3306 OS::Print("%" Pu64, icount_);
3307 const uword start = reinterpret_cast<uword>(instr); 3307 const uword start = reinterpret_cast<uword>(instr);
3308 const uword end = start + Instr::kInstrSize; 3308 const uword end = start + Instr::kInstrSize;
3309 Disassembler::Disassemble(start, end); 3309 Disassembler::Disassemble(start, end);
3310 } 3310 }
3311 3311
3312 if (instr->IsDPImmediateOp()) { 3312 if (instr->IsDPImmediateOp()) {
3313 DecodeDPImmediate(instr); 3313 DecodeDPImmediate(instr);
3314 } else if (instr->IsCompareBranchOp()) { 3314 } else if (instr->IsCompareBranchOp()) {
3315 DecodeCompareBranch(instr); 3315 DecodeCompareBranch(instr);
3316 } else if (instr->IsLoadStoreOp()) { 3316 } else if (instr->IsLoadStoreOp()) {
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3501 set_register(NULL, kExceptionObjectReg, bit_cast<int64_t>(raw_exception)); 3501 set_register(NULL, kExceptionObjectReg, bit_cast<int64_t>(raw_exception));
3502 set_register(NULL, kStackTraceObjectReg, bit_cast<int64_t>(raw_stacktrace)); 3502 set_register(NULL, kStackTraceObjectReg, bit_cast<int64_t>(raw_stacktrace));
3503 buf->Longjmp(); 3503 buf->Longjmp();
3504 } 3504 }
3505 3505
3506 } // namespace dart 3506 } // namespace dart
3507 3507
3508 #endif // !defined(HOST_ARCH_ARM64) 3508 #endif // !defined(HOST_ARCH_ARM64)
3509 3509
3510 #endif // defined TARGET_ARCH_ARM64 3510 #endif // defined TARGET_ARCH_ARM64
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