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Issue 90643003: Experimental implementation: Exposing SIMD instructions into JavaScript Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 7 years ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 385 matching lines...) Expand 10 before | Expand all | Expand 10 after
396 __ divsd(xmm1, xmm0); 396 __ divsd(xmm1, xmm0);
397 __ ucomisd(xmm0, xmm1); 397 __ ucomisd(xmm0, xmm1);
398 __ cmpltsd(xmm0, xmm1); 398 __ cmpltsd(xmm0, xmm1);
399 399
400 __ andpd(xmm0, xmm1); 400 __ andpd(xmm0, xmm1);
401 __ psllq(xmm0, 17); 401 __ psllq(xmm0, 17);
402 __ psllq(xmm0, xmm1); 402 __ psllq(xmm0, xmm1);
403 __ psrlq(xmm0, 17); 403 __ psrlq(xmm0, 17);
404 __ psrlq(xmm0, xmm1); 404 __ psrlq(xmm0, xmm1);
405 __ por(xmm0, xmm1); 405 __ por(xmm0, xmm1);
406
407 // new instruction introduced by SIMD
408 __ cvtdq2ps(xmm1, Operand(ebx, ecx, times_4, 10000));
409 __ cvtdq2ps(xmm1, xmm0);
410 __ cvtps2dq(xmm1, Operand(ebx, ecx, times_4, 10000));
411 __ cvtps2dq(xmm1, xmm0);
412 __ paddd(xmm1, Operand(ebx, ecx, times_4, 10000));
413 __ paddd(xmm1, xmm0);
414 __ psubd(xmm1, Operand(ebx, ecx, times_4, 10000));
415 __ psubd(xmm1, xmm0);
416 __ pmuludq(xmm1, Operand(ebx, ecx, times_4, 10000));
417 __ pmuludq(xmm1, xmm0);
418 __ punpackldq(xmm1, Operand(ebx, ecx, times_4, 10000));
419 __ punpackldq(xmm1, xmm0);
420 {
421 __ shufps(xmm1, xmm1, 0x0);
422 __ movups(xmm1, Operand(ebx, ecx, times_4, 10000));
423 __ movups(Operand(ebx, ecx, times_4, 10000), xmm1);
424
425 __ andps(xmm1, Operand(ebx, ecx, times_4, 10000));
426 __ andps(xmm1, xmm0);
427 __ xorps(xmm1, Operand(ebx, ecx, times_4, 10000));
428 __ xorps(xmm1, xmm0);
429 __ orps(xmm1, Operand(ebx, ecx, times_4, 10000));
430 __ orps(xmm1, xmm0);
431
432 __ addps(xmm1, Operand(ebx, ecx, times_4, 10000));
433 __ addps(xmm1, xmm0);
434 __ subps(xmm1, Operand(ebx, ecx, times_4, 10000));
435 __ subps(xmm1, xmm0);
436 __ mulps(xmm1, Operand(ebx, ecx, times_4, 10000));
437 __ mulps(xmm1, xmm0);
438 __ divps(xmm1, Operand(ebx, ecx, times_4, 10000));
439 __ divps(xmm1, xmm0);
440 __ minps(xmm1, Operand(ebx, ecx, times_4, 10000));
441 __ minps(xmm1, xmm0);
442 __ maxps(xmm1, Operand(ebx, ecx, times_4, 10000));
443 __ maxps(xmm1, xmm0);
444 __ rcpps(xmm1, Operand(ebx, ecx, times_4, 10000));
445 __ rcpps(xmm1, xmm0);
446 __ rsqrtps(xmm1, Operand(ebx, ecx, times_4, 10000));
447 __ rsqrtps(xmm1, xmm0);
448 __ sqrtps(xmm1, Operand(ebx, ecx, times_4, 10000));
449 __ sqrtps(xmm1, xmm0);
450
451 __ cmpeqps(xmm1, xmm0);
452 __ cmpltps(xmm1, xmm0);
453 __ cmpleps(xmm1, xmm0);
454 __ cmpneqps(xmm1, xmm0);
455 __ cmpnltps(xmm1, xmm0);
456 __ cmpnleps(xmm1, xmm0);
457 }
406 } 458 }
407 } 459 }
408 460
409 // cmov. 461 // cmov.
410 { 462 {
411 if (CpuFeatures::IsSupported(CMOV)) { 463 if (CpuFeatures::IsSupported(CMOV)) {
412 CpuFeatureScope use_cmov(&assm, CMOV); 464 CpuFeatureScope use_cmov(&assm, CMOV);
413 __ cmov(overflow, eax, Operand(eax, 0)); 465 __ cmov(overflow, eax, Operand(eax, 0));
414 __ cmov(no_overflow, eax, Operand(eax, 1)); 466 __ cmov(no_overflow, eax, Operand(eax, 1));
415 __ cmov(below, eax, Operand(eax, 2)); 467 __ cmov(below, eax, Operand(eax, 2));
(...skipping 13 matching lines...) Expand all
429 } 481 }
430 } 482 }
431 483
432 { 484 {
433 if (CpuFeatures::IsSupported(SSE2) && 485 if (CpuFeatures::IsSupported(SSE2) &&
434 CpuFeatures::IsSupported(SSE4_1)) { 486 CpuFeatures::IsSupported(SSE4_1)) {
435 CpuFeatureScope scope(&assm, SSE4_1); 487 CpuFeatureScope scope(&assm, SSE4_1);
436 __ pextrd(eax, xmm0, 1); 488 __ pextrd(eax, xmm0, 1);
437 __ pinsrd(xmm1, eax, 0); 489 __ pinsrd(xmm1, eax, 0);
438 __ extractps(eax, xmm1, 0); 490 __ extractps(eax, xmm1, 0);
491 __ insertps(xmm1, xmm0, 0);
492 __ pmulld(xmm1, Operand(ebx, ecx, times_4, 10000));
493 __ pmulld(xmm1, xmm0);
439 } 494 }
440 } 495 }
441 496
442 // Nop instructions 497 // Nop instructions
443 for (int i = 0; i < 16; i++) { 498 for (int i = 0; i < 16; i++) {
444 __ Nop(i); 499 __ Nop(i);
445 } 500 }
446 501
447 __ ret(0); 502 __ ret(0);
448 503
449 CodeDesc desc; 504 CodeDesc desc;
450 assm.GetCode(&desc); 505 assm.GetCode(&desc);
451 Object* code = isolate->heap()->CreateCode( 506 Object* code = isolate->heap()->CreateCode(
452 desc, 507 desc,
453 Code::ComputeFlags(Code::STUB), 508 Code::ComputeFlags(Code::STUB),
454 Handle<Code>())->ToObjectChecked(); 509 Handle<Code>())->ToObjectChecked();
455 CHECK(code->IsCode()); 510 CHECK(code->IsCode());
456 #ifdef OBJECT_PRINT 511 #ifdef OBJECT_PRINT
457 Code::cast(code)->Print(); 512 Code::cast(code)->Print();
458 byte* begin = Code::cast(code)->instruction_start(); 513 byte* begin = Code::cast(code)->instruction_start();
459 byte* end = begin + Code::cast(code)->instruction_size(); 514 byte* end = begin + Code::cast(code)->instruction_size();
460 disasm::Disassembler::Disassemble(stdout, begin, end); 515 disasm::Disassembler::Disassemble(stdout, begin, end);
461 #endif 516 #endif
462 } 517 }
463 518
464 #undef __ 519 #undef __
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