Adds accessor methods to class ClFlags.

src/IceCfg.cpp

 //===- subzero/src/IceCfg.cpp - Control flow graph implementation ---------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the Cfg class, including constant pool
@@ skipping 63 matching lines @@
 // is used for dumping the stack frame location of Variables.
 bool Cfg::hasComputedFrame() const { return getTarget()->hasComputedFrame(); }
 
 void Cfg::translate() {
   if (hasError())
     return;
   // FunctionTimer conditionally pushes/pops a TimerMarker if
   // TimeEachFunction is enabled.
   std::unique_ptr<TimerMarker> FunctionTimer;
   if (ALLOW_DUMP) {
-    const IceString &TimingFocusOn = getContext()->getFlags().TimingFocusOn;
+    const IceString &TimingFocusOn =
+        getContext()->getFlags().getTimingFocusOn();
     const IceString &Name = getFunctionName();
     if (TimingFocusOn == "*" || TimingFocusOn == Name) {
       setFocusedTiming();
       getContext()->resetTimer(GlobalContext::TSK_Default);
       getContext()->setTimerName(GlobalContext::TSK_Default, Name);
     }
-    if (getContext()->getFlags().TimeEachFunction)
+    if (getContext()->getFlags().getTimeEachFunction())
       FunctionTimer.reset(new TimerMarker(
           getContext()->getTimerID(GlobalContext::TSK_Funcs, Name),
           getContext(), GlobalContext::TSK_Funcs));
   }
   TimerMarker T(TimerStack::TT_translate, this);
 
   dump("Initial CFG");
 
   // The set of translation passes and their order are determined by
   // the target.
@@ skipping 290 matching lines @@
   return Valid;
 }
 
 void Cfg::contractEmptyNodes() {
   // If we're decorating the asm output with register liveness info,
   // this information may become corrupted or incorrect after
   // contracting nodes that contain only redundant assignments.  As
   // such, we disable this pass when DecorateAsm is specified.  This
   // may make the resulting code look more branchy, but it should have
   // no effect on the register assignments.
-  if (Ctx->getFlags().DecorateAsm)
+  if (Ctx->getFlags().getDecorateAsm())
     return;
   for (CfgNode *Node : Nodes) {
     Node->contractIfEmpty();
   }
 }
 
 void Cfg::doBranchOpt() {
   TimerMarker T(TimerStack::TT_doBranchOpt, this);
   for (auto I = Nodes.begin(), E = Nodes.end(); I != E; ++I) {
     auto NextNode = I;
     ++NextNode;
     (*I)->doBranchOpt(NextNode == E ? nullptr : *NextNode);
   }
 }
 
 // ======================== Dump routines ======================== //
 
 void Cfg::emitTextHeader(const IceString &MangledName) {
   // Note: Still used by emit IAS.
   Ostream &Str = Ctx->getStrEmit();
   Str << "\t.text\n";
-  if (Ctx->getFlags().FunctionSections)
+  if (Ctx->getFlags().getFunctionSections())
     Str << "\t.section\t.text." << MangledName << ",\"ax\",@progbits\n";
-  if (!getInternal() || Ctx->getFlags().DisableInternal) {
+  if (!getInternal() || Ctx->getFlags().getDisableInternal()) {
     Str << "\t.globl\t" << MangledName << "\n";
     Str << "\t.type\t" << MangledName << ",@function\n";
   }
   Assembler *Asm = getAssembler<Assembler>();
   Str << "\t.p2align " << Asm->getBundleAlignLog2Bytes() << ",0x";
   for (uint8_t I : Asm->getNonExecBundlePadding())
     Str.write_hex(I);
   Str << "\n";
   Str << MangledName << ":\n";
 }
 
 void Cfg::emit() {
   if (!ALLOW_DUMP)
     return;
   TimerMarker T(TimerStack::TT_emit, this);
-  if (Ctx->getFlags().DecorateAsm) {
+  if (Ctx->getFlags().getDecorateAsm()) {
     renumberInstructions();
     getVMetadata()->init(VMK_Uses);
     liveness(Liveness_Basic);
     dump("After recomputing liveness for -decorate-asm");
   }
   OstreamLocker L(Ctx);
   Ostream &Str = Ctx->getStrEmit();
   IceString MangledName = getContext()->mangleName(getFunctionName());
   emitTextHeader(MangledName);
   for (CfgNode *Node : Nodes)
     Node->emit(this);
   Str << "\n";
 }
 
 void Cfg::emitIAS() {
   TimerMarker T(TimerStack::TT_emit, this);
-  assert(!Ctx->getFlags().DecorateAsm);
+  assert(!Ctx->getFlags().getDecorateAsm());
   IceString MangledName = getContext()->mangleName(getFunctionName());
   // The emitIAS() routines emit into the internal assembler buffer,
   // so there's no need to lock the streams until we're ready to call
   // emitIASBytes().
   for (CfgNode *Node : Nodes)
     Node->emitIAS(this);
   // Now write the function to the file and track.
-  if (Ctx->getFlags().UseELFWriter) {
+  if (Ctx->getFlags().getUseELFWriter()) {
     getAssembler<Assembler>()->alignFunction();
     Ctx->getObjectWriter()->writeFunctionCode(MangledName, getInternal(),
                                               getAssembler<Assembler>());
   } else {
     OstreamLocker L(Ctx);
     emitTextHeader(MangledName);
     getAssembler<Assembler>()->emitIASBytes(Ctx);
   }
 }
 
 // Dumps the IR with an optional introductory message.
 void Cfg::dump(const IceString &Message) {
   if (!ALLOW_DUMP)
     return;
   if (!isVerbose())
     return;
   OstreamLocker L(Ctx);
   Ostream &Str = Ctx->getStrDump();
   if (!Message.empty())
     Str << "================ " << Message << " ================\n";
   setCurrentNode(getEntryNode());
   // Print function name+args
   if (isVerbose(IceV_Instructions)) {
     Str << "define ";
-    if (getInternal() && !Ctx->getFlags().DisableInternal)
+    if (getInternal() && !Ctx->getFlags().getDisableInternal())
       Str << "internal ";
     Str << ReturnType << " @" << Ctx->mangleName(getFunctionName()) << "(";
     for (SizeT i = 0; i < Args.size(); ++i) {
       if (i > 0)
         Str << ", ";
       Str << Args[i]->getType() << " ";
       Args[i]->dump(this);
     }
     Str << ") {\n";
   }
@@ skipping 12 matching lines @@
     }
   }
   // Print each basic block
   for (CfgNode *Node : Nodes)
     Node->dump(this);
   if (isVerbose(IceV_Instructions))
     Str << "}\n";
 }
 
 } // end of namespace Ice