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Issue 904693002: [turbofan] Remove global InstructionOperand caches. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 10 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/linkage.h" 5 #include "src/compiler/linkage.h"
6 #include "src/compiler/register-allocator.h" 6 #include "src/compiler/register-allocator.h"
7 #include "src/string-stream.h" 7 #include "src/string-stream.h"
8 8
9 namespace v8 { 9 namespace v8 {
10 namespace internal { 10 namespace internal {
(...skipping 117 matching lines...) Expand 10 before | Expand all | Expand 10 after
128 next_(nullptr), 128 next_(nullptr),
129 current_interval_(nullptr), 129 current_interval_(nullptr),
130 last_processed_use_(nullptr), 130 last_processed_use_(nullptr),
131 current_hint_operand_(nullptr), 131 current_hint_operand_(nullptr),
132 spill_start_index_(kMaxInt), 132 spill_start_index_(kMaxInt),
133 spill_type_(SpillType::kNoSpillType), 133 spill_type_(SpillType::kNoSpillType),
134 spill_operand_(nullptr), 134 spill_operand_(nullptr),
135 spills_at_definition_(nullptr) {} 135 spills_at_definition_(nullptr) {}
136 136
137 137
138 void LiveRange::set_assigned_register(int reg, Zone* zone) { 138 void LiveRange::set_assigned_register(int reg,
139 InstructionOperandCache* operand_cache) {
139 DCHECK(!HasRegisterAssigned() && !IsSpilled()); 140 DCHECK(!HasRegisterAssigned() && !IsSpilled());
140 assigned_register_ = reg; 141 assigned_register_ = reg;
141 // TODO(dcarney): stop aliasing hint operands. 142 // TODO(dcarney): stop aliasing hint operands.
142 ConvertUsesToOperand(CreateAssignedOperand(zone)); 143 ConvertUsesToOperand(GetAssignedOperand(operand_cache));
143 } 144 }
144 145
145 146
146 void LiveRange::MakeSpilled() { 147 void LiveRange::MakeSpilled() {
147 DCHECK(!IsSpilled()); 148 DCHECK(!IsSpilled());
148 DCHECK(!TopLevel()->HasNoSpillType()); 149 DCHECK(!TopLevel()->HasNoSpillType());
149 spilled_ = true; 150 spilled_ = true;
150 assigned_register_ = kInvalidAssignment; 151 assigned_register_ = kInvalidAssignment;
151 } 152 }
152 153
(...skipping 90 matching lines...) Expand 10 before | Expand all | Expand 10 after
243 bool LiveRange::CanBeSpilled(LifetimePosition pos) { 244 bool LiveRange::CanBeSpilled(LifetimePosition pos) {
244 // We cannot spill a live range that has a use requiring a register 245 // We cannot spill a live range that has a use requiring a register
245 // at the current or the immediate next position. 246 // at the current or the immediate next position.
246 auto use_pos = NextRegisterPosition(pos); 247 auto use_pos = NextRegisterPosition(pos);
247 if (use_pos == nullptr) return true; 248 if (use_pos == nullptr) return true;
248 return use_pos->pos().Value() > 249 return use_pos->pos().Value() >
249 pos.NextInstruction().InstructionEnd().Value(); 250 pos.NextInstruction().InstructionEnd().Value();
250 } 251 }
251 252
252 253
253 InstructionOperand* LiveRange::CreateAssignedOperand(Zone* zone) const { 254 InstructionOperand* LiveRange::GetAssignedOperand(
254 InstructionOperand* op = nullptr; 255 InstructionOperandCache* cache) const {
255 if (HasRegisterAssigned()) { 256 if (HasRegisterAssigned()) {
256 DCHECK(!IsSpilled()); 257 DCHECK(!IsSpilled());
257 switch (Kind()) { 258 switch (Kind()) {
258 case GENERAL_REGISTERS: 259 case GENERAL_REGISTERS:
259 op = RegisterOperand::Create(assigned_register(), zone); 260 return cache->RegisterOperand(assigned_register());
260 break;
261 case DOUBLE_REGISTERS: 261 case DOUBLE_REGISTERS:
262 op = DoubleRegisterOperand::Create(assigned_register(), zone); 262 return cache->DoubleRegisterOperand(assigned_register());
263 break;
264 default: 263 default:
265 UNREACHABLE(); 264 UNREACHABLE();
266 } 265 }
267 } else {
268 DCHECK(IsSpilled());
269 DCHECK(!HasRegisterAssigned());
270 op = TopLevel()->GetSpillOperand();
271 DCHECK(!op->IsUnallocated());
272 } 266 }
267 DCHECK(IsSpilled());
268 DCHECK(!HasRegisterAssigned());
269 auto op = TopLevel()->GetSpillOperand();
270 DCHECK(!op->IsUnallocated());
273 return op; 271 return op;
274 } 272 }
275 273
276 274
275 InstructionOperand LiveRange::GetAssignedOperand() const {
276 if (HasRegisterAssigned()) {
277 DCHECK(!IsSpilled());
278 switch (Kind()) {
279 case GENERAL_REGISTERS:
280 return RegisterOperand(assigned_register());
281 case DOUBLE_REGISTERS:
282 return DoubleRegisterOperand(assigned_register());
283 default:
284 UNREACHABLE();
285 }
286 }
287 DCHECK(IsSpilled());
288 DCHECK(!HasRegisterAssigned());
289 auto op = TopLevel()->GetSpillOperand();
290 DCHECK(!op->IsUnallocated());
291 return *op;
292 }
293
294
277 UseInterval* LiveRange::FirstSearchIntervalForPosition( 295 UseInterval* LiveRange::FirstSearchIntervalForPosition(
278 LifetimePosition position) const { 296 LifetimePosition position) const {
279 if (current_interval_ == nullptr) return first_interval_; 297 if (current_interval_ == nullptr) return first_interval_;
280 if (current_interval_->start().Value() > position.Value()) { 298 if (current_interval_->start().Value() > position.Value()) {
281 current_interval_ = nullptr; 299 current_interval_ = nullptr;
282 return first_interval_; 300 return first_interval_;
283 } 301 }
284 return current_interval_; 302 return current_interval_;
285 } 303 }
286 304
(...skipping 259 matching lines...) Expand 10 before | Expand all | Expand 10 after
546 if (a == nullptr || a->start().Value() > other->End().Value()) break; 564 if (a == nullptr || a->start().Value() > other->End().Value()) break;
547 AdvanceLastProcessedMarker(a, advance_last_processed_up_to); 565 AdvanceLastProcessedMarker(a, advance_last_processed_up_to);
548 } else { 566 } else {
549 b = b->next(); 567 b = b->next();
550 } 568 }
551 } 569 }
552 return LifetimePosition::Invalid(); 570 return LifetimePosition::Invalid();
553 } 571 }
554 572
555 573
574 InstructionOperandCache::InstructionOperandCache() {
575 for (size_t i = 0; i < arraysize(general_register_operands_); ++i) {
576 general_register_operands_[i] =
577 i::compiler::RegisterOperand(static_cast<int>(i));
578 }
579 for (size_t i = 0; i < arraysize(double_register_operands_); ++i) {
580 double_register_operands_[i] =
581 i::compiler::DoubleRegisterOperand(static_cast<int>(i));
582 }
583 }
584
585
556 RegisterAllocator::RegisterAllocator(const RegisterConfiguration* config, 586 RegisterAllocator::RegisterAllocator(const RegisterConfiguration* config,
557 Zone* zone, Frame* frame, 587 Zone* zone, Frame* frame,
558 InstructionSequence* code, 588 InstructionSequence* code,
559 const char* debug_name) 589 const char* debug_name)
560 : local_zone_(zone), 590 : local_zone_(zone),
561 frame_(frame), 591 frame_(frame),
562 code_(code), 592 code_(code),
563 debug_name_(debug_name), 593 debug_name_(debug_name),
564 config_(config), 594 config_(config),
595 operand_cache_(new (code_zone()) InstructionOperandCache()),
565 phi_map_(PhiMap::key_compare(), PhiMap::allocator_type(local_zone())), 596 phi_map_(PhiMap::key_compare(), PhiMap::allocator_type(local_zone())),
566 live_in_sets_(code->InstructionBlockCount(), nullptr, local_zone()), 597 live_in_sets_(code->InstructionBlockCount(), nullptr, local_zone()),
567 live_ranges_(code->VirtualRegisterCount() * 2, nullptr, local_zone()), 598 live_ranges_(code->VirtualRegisterCount() * 2, nullptr, local_zone()),
568 fixed_live_ranges_(this->config()->num_general_registers(), nullptr, 599 fixed_live_ranges_(this->config()->num_general_registers(), nullptr,
569 local_zone()), 600 local_zone()),
570 fixed_double_live_ranges_(this->config()->num_double_registers(), nullptr, 601 fixed_double_live_ranges_(this->config()->num_double_registers(), nullptr,
571 local_zone()), 602 local_zone()),
572 unhandled_live_ranges_(local_zone()), 603 unhandled_live_ranges_(local_zone()),
573 active_live_ranges_(local_zone()), 604 active_live_ranges_(local_zone()),
574 inactive_live_ranges_(local_zone()), 605 inactive_live_ranges_(local_zone()),
575 reusable_slots_(local_zone()),
576 spill_ranges_(local_zone()), 606 spill_ranges_(local_zone()),
577 mode_(UNALLOCATED_REGISTERS), 607 mode_(UNALLOCATED_REGISTERS),
578 num_registers_(-1) { 608 num_registers_(-1) {
579 DCHECK(this->config()->num_general_registers() <= 609 DCHECK(this->config()->num_general_registers() <=
580 RegisterConfiguration::kMaxGeneralRegisters); 610 RegisterConfiguration::kMaxGeneralRegisters);
581 DCHECK(this->config()->num_double_registers() <= 611 DCHECK(this->config()->num_double_registers() <=
582 RegisterConfiguration::kMaxDoubleRegisters); 612 RegisterConfiguration::kMaxDoubleRegisters);
583 // TryAllocateFreeReg and AllocateBlockedReg assume this 613 // TryAllocateFreeReg and AllocateBlockedReg assume this
584 // when allocating local arrays. 614 // when allocating local arrays.
585 DCHECK(RegisterConfiguration::kMaxDoubleRegisters >= 615 DCHECK(RegisterConfiguration::kMaxDoubleRegisters >=
586 this->config()->num_general_registers()); 616 this->config()->num_general_registers());
587 unhandled_live_ranges().reserve( 617 unhandled_live_ranges().reserve(
588 static_cast<size_t>(code->VirtualRegisterCount() * 2)); 618 static_cast<size_t>(code->VirtualRegisterCount() * 2));
589 active_live_ranges().reserve(8); 619 active_live_ranges().reserve(8);
590 inactive_live_ranges().reserve(8); 620 inactive_live_ranges().reserve(8);
591 reusable_slots().reserve(8);
592 spill_ranges().reserve(8); 621 spill_ranges().reserve(8);
593 assigned_registers_ = 622 assigned_registers_ =
594 new (code_zone()) BitVector(config->num_general_registers(), code_zone()); 623 new (code_zone()) BitVector(config->num_general_registers(), code_zone());
595 assigned_double_registers_ = new (code_zone()) 624 assigned_double_registers_ = new (code_zone())
596 BitVector(config->num_aliased_double_registers(), code_zone()); 625 BitVector(config->num_aliased_double_registers(), code_zone());
597 frame->SetAllocatedRegisters(assigned_registers_); 626 frame->SetAllocatedRegisters(assigned_registers_);
598 frame->SetAllocatedDoubleRegisters(assigned_double_registers_); 627 frame->SetAllocatedDoubleRegisters(assigned_double_registers_);
599 } 628 }
600 629
601 630
(...skipping 321 matching lines...) Expand 10 before | Expand all | Expand 10 after
923 range->SetOperand(op); 952 range->SetOperand(op);
924 } 953 }
925 } 954 }
926 955
927 956
928 void RegisterAllocator::CommitAssignment() { 957 void RegisterAllocator::CommitAssignment() {
929 for (auto range : live_ranges()) { 958 for (auto range : live_ranges()) {
930 if (range == nullptr || range->IsEmpty()) continue; 959 if (range == nullptr || range->IsEmpty()) continue;
931 // Register assignments were committed in set_assigned_register. 960 // Register assignments were committed in set_assigned_register.
932 if (range->HasRegisterAssigned()) continue; 961 if (range->HasRegisterAssigned()) continue;
933 auto assigned = range->CreateAssignedOperand(code_zone()); 962 auto assigned = range->GetAssignedOperand(operand_cache());
934 range->ConvertUsesToOperand(assigned); 963 range->ConvertUsesToOperand(assigned);
935 if (range->IsSpilled()) { 964 if (range->IsSpilled()) {
936 range->CommitSpillsAtDefinition(code(), assigned); 965 range->CommitSpillsAtDefinition(code(), assigned);
937 } 966 }
938 } 967 }
939 } 968 }
940 969
941 970
942 SpillRange* RegisterAllocator::AssignSpillRangeToLiveRange(LiveRange* range) { 971 SpillRange* RegisterAllocator::AssignSpillRangeToLiveRange(LiveRange* range) {
943 auto spill_range = new (local_zone()) SpillRange(range, local_zone()); 972 auto spill_range = new (local_zone()) SpillRange(range, local_zone());
(...skipping 474 matching lines...) Expand 10 before | Expand all | Expand 10 after
1418 // Add gap move if the two live ranges touch and there is no block 1447 // Add gap move if the two live ranges touch and there is no block
1419 // boundary. 1448 // boundary.
1420 if (first_range->End().Value() == pos.Value()) { 1449 if (first_range->End().Value() == pos.Value()) {
1421 bool should_insert = true; 1450 bool should_insert = true;
1422 if (IsBlockBoundary(pos)) { 1451 if (IsBlockBoundary(pos)) {
1423 should_insert = 1452 should_insert =
1424 CanEagerlyResolveControlFlow(GetInstructionBlock(pos)); 1453 CanEagerlyResolveControlFlow(GetInstructionBlock(pos));
1425 } 1454 }
1426 if (should_insert) { 1455 if (should_insert) {
1427 auto move = GetConnectingParallelMove(pos); 1456 auto move = GetConnectingParallelMove(pos);
1428 auto prev_operand = first_range->CreateAssignedOperand(code_zone()); 1457 auto prev_operand =
1429 auto cur_operand = second_range->CreateAssignedOperand(code_zone()); 1458 first_range->GetAssignedOperand(operand_cache());
1459 auto cur_operand =
1460 second_range->GetAssignedOperand(operand_cache());
1430 move->AddMove(prev_operand, cur_operand, code_zone()); 1461 move->AddMove(prev_operand, cur_operand, code_zone());
1431 } 1462 }
1432 } 1463 }
1433 } 1464 }
1434 first_range = second_range; 1465 first_range = second_range;
1435 second_range = second_range->next(); 1466 second_range = second_range->next();
1436 } 1467 }
1437 } 1468 }
1438 } 1469 }
1439 1470
(...skipping 143 matching lines...) Expand 10 before | Expand all | Expand 10 after
1583 // Lazily linearize live ranges in memory for fast lookup. 1614 // Lazily linearize live ranges in memory for fast lookup.
1584 LiveRangeFinder finder(*this); 1615 LiveRangeFinder finder(*this);
1585 for (auto block : code()->instruction_blocks()) { 1616 for (auto block : code()->instruction_blocks()) {
1586 if (CanEagerlyResolveControlFlow(block)) continue; 1617 if (CanEagerlyResolveControlFlow(block)) continue;
1587 if (FLAG_turbo_delay_ssa_decon) { 1618 if (FLAG_turbo_delay_ssa_decon) {
1588 // resolve phis 1619 // resolve phis
1589 for (auto phi : block->phis()) { 1620 for (auto phi : block->phis()) {
1590 auto* block_bound = 1621 auto* block_bound =
1591 finder.ArrayFor(phi->virtual_register())->FindSucc(block); 1622 finder.ArrayFor(phi->virtual_register())->FindSucc(block);
1592 auto phi_output = 1623 auto phi_output =
1593 block_bound->range_->CreateAssignedOperand(code_zone()); 1624 block_bound->range_->GetAssignedOperand(operand_cache());
1594 phi->output()->ConvertTo(phi_output->kind(), phi_output->index()); 1625 phi->output()->ConvertTo(phi_output->kind(), phi_output->index());
1595 size_t pred_index = 0; 1626 size_t pred_index = 0;
1596 for (auto pred : block->predecessors()) { 1627 for (auto pred : block->predecessors()) {
1597 const InstructionBlock* pred_block = code()->InstructionBlockAt(pred); 1628 const InstructionBlock* pred_block = code()->InstructionBlockAt(pred);
1598 auto* pred_bound = finder.ArrayFor(phi->operands()[pred_index]) 1629 auto* pred_bound = finder.ArrayFor(phi->operands()[pred_index])
1599 ->FindPred(pred_block); 1630 ->FindPred(pred_block);
1600 auto pred_op = pred_bound->range_->CreateAssignedOperand(code_zone()); 1631 auto pred_op =
1632 pred_bound->range_->GetAssignedOperand(operand_cache());
1601 phi->inputs()[pred_index] = pred_op; 1633 phi->inputs()[pred_index] = pred_op;
1602 ResolveControlFlow(block, phi_output, pred_block, pred_op); 1634 ResolveControlFlow(block, phi_output, pred_block, pred_op);
1603 pred_index++; 1635 pred_index++;
1604 } 1636 }
1605 } 1637 }
1606 } 1638 }
1607 auto live = live_in_sets_[block->rpo_number().ToInt()]; 1639 auto live = live_in_sets_[block->rpo_number().ToInt()];
1608 BitVector::Iterator iterator(live); 1640 BitVector::Iterator iterator(live);
1609 while (!iterator.Done()) { 1641 while (!iterator.Done()) {
1610 auto* array = finder.ArrayFor(iterator.Current()); 1642 auto* array = finder.ArrayFor(iterator.Current());
1611 for (auto pred : block->predecessors()) { 1643 for (auto pred : block->predecessors()) {
1612 FindResult result; 1644 FindResult result;
1613 const auto* pred_block = code()->InstructionBlockAt(pred); 1645 const auto* pred_block = code()->InstructionBlockAt(pred);
1614 array->Find(block, pred_block, &result); 1646 array->Find(block, pred_block, &result);
1615 if (result.cur_cover_ == result.pred_cover_ || 1647 if (result.cur_cover_ == result.pred_cover_ ||
1616 result.cur_cover_->IsSpilled()) 1648 result.cur_cover_->IsSpilled())
1617 continue; 1649 continue;
1618 auto pred_op = result.pred_cover_->CreateAssignedOperand(code_zone()); 1650 auto pred_op = result.pred_cover_->GetAssignedOperand(operand_cache());
1619 auto cur_op = result.cur_cover_->CreateAssignedOperand(code_zone()); 1651 auto cur_op = result.cur_cover_->GetAssignedOperand(operand_cache());
1620 ResolveControlFlow(block, cur_op, pred_block, pred_op); 1652 ResolveControlFlow(block, cur_op, pred_block, pred_op);
1621 } 1653 }
1622 iterator.Advance(); 1654 iterator.Advance();
1623 } 1655 }
1624 } 1656 }
1625 } 1657 }
1626 1658
1627 1659
1628 void RegisterAllocator::ResolveControlFlow(const InstructionBlock* block, 1660 void RegisterAllocator::ResolveControlFlow(const InstructionBlock* block,
1629 InstructionOperand* cur_op, 1661 InstructionOperand* cur_op,
(...skipping 201 matching lines...) Expand 10 before | Expand all | Expand 10 after
1831 TraceAlloc("Pointer for range %d (spilled at %d) at safe point %d\n", 1863 TraceAlloc("Pointer for range %d (spilled at %d) at safe point %d\n",
1832 range->id(), range->spill_start_index(), safe_point); 1864 range->id(), range->spill_start_index(), safe_point);
1833 map->RecordPointer(range->GetSpillOperand(), code_zone()); 1865 map->RecordPointer(range->GetSpillOperand(), code_zone());
1834 } 1866 }
1835 1867
1836 if (!cur->IsSpilled()) { 1868 if (!cur->IsSpilled()) {
1837 TraceAlloc( 1869 TraceAlloc(
1838 "Pointer in register for range %d (start at %d) " 1870 "Pointer in register for range %d (start at %d) "
1839 "at safe point %d\n", 1871 "at safe point %d\n",
1840 cur->id(), cur->Start().Value(), safe_point); 1872 cur->id(), cur->Start().Value(), safe_point);
1841 InstructionOperand* operand = cur->CreateAssignedOperand(code_zone()); 1873 InstructionOperand* operand = cur->GetAssignedOperand(operand_cache());
1842 DCHECK(!operand->IsStackSlot()); 1874 DCHECK(!operand->IsStackSlot());
1843 map->RecordPointer(operand, code_zone()); 1875 map->RecordPointer(operand, code_zone());
1844 } 1876 }
1845 } 1877 }
1846 } 1878 }
1847 } 1879 }
1848 1880
1849 1881
1850 void RegisterAllocator::AllocateGeneralRegisters() { 1882 void RegisterAllocator::AllocateGeneralRegisters() {
1851 num_registers_ = config()->num_general_registers(); 1883 num_registers_ = config()->num_general_registers();
(...skipping 14 matching lines...) Expand all
1866 1898
1867 for (auto range : live_ranges()) { 1899 for (auto range : live_ranges()) {
1868 if (range == nullptr) continue; 1900 if (range == nullptr) continue;
1869 if (range->Kind() == mode_) { 1901 if (range->Kind() == mode_) {
1870 AddToUnhandledUnsorted(range); 1902 AddToUnhandledUnsorted(range);
1871 } 1903 }
1872 } 1904 }
1873 SortUnhandled(); 1905 SortUnhandled();
1874 DCHECK(UnhandledIsSorted()); 1906 DCHECK(UnhandledIsSorted());
1875 1907
1876 DCHECK(reusable_slots().empty());
1877 DCHECK(active_live_ranges().empty()); 1908 DCHECK(active_live_ranges().empty());
1878 DCHECK(inactive_live_ranges().empty()); 1909 DCHECK(inactive_live_ranges().empty());
1879 1910
1880 if (mode_ == DOUBLE_REGISTERS) { 1911 if (mode_ == DOUBLE_REGISTERS) {
1881 for (int i = 0; i < config()->num_aliased_double_registers(); ++i) { 1912 for (int i = 0; i < config()->num_aliased_double_registers(); ++i) {
1882 auto current = fixed_double_live_ranges()[i]; 1913 auto current = fixed_double_live_ranges()[i];
1883 if (current != nullptr) { 1914 if (current != nullptr) {
1884 AddToInactive(current); 1915 AddToInactive(current);
1885 } 1916 }
1886 } 1917 }
(...skipping 66 matching lines...) Expand 10 before | Expand all | Expand 10 after
1953 1984
1954 DCHECK(!current->HasRegisterAssigned() && !current->IsSpilled()); 1985 DCHECK(!current->HasRegisterAssigned() && !current->IsSpilled());
1955 1986
1956 bool result = TryAllocateFreeReg(current); 1987 bool result = TryAllocateFreeReg(current);
1957 if (!result) AllocateBlockedReg(current); 1988 if (!result) AllocateBlockedReg(current);
1958 if (current->HasRegisterAssigned()) { 1989 if (current->HasRegisterAssigned()) {
1959 AddToActive(current); 1990 AddToActive(current);
1960 } 1991 }
1961 } 1992 }
1962 1993
1963 reusable_slots().clear();
1964 active_live_ranges().clear(); 1994 active_live_ranges().clear();
1965 inactive_live_ranges().clear(); 1995 inactive_live_ranges().clear();
1966 } 1996 }
1967 1997
1968 1998
1969 const char* RegisterAllocator::RegisterName(int allocation_index) { 1999 const char* RegisterAllocator::RegisterName(int allocation_index) {
1970 if (mode_ == GENERAL_REGISTERS) { 2000 if (mode_ == GENERAL_REGISTERS) {
1971 return config()->general_register_name(allocation_index); 2001 return config()->general_register_name(allocation_index);
1972 } else { 2002 } else {
1973 return config()->double_register_name(allocation_index); 2003 return config()->double_register_name(allocation_index);
(...skipping 494 matching lines...) Expand 10 before | Expand all | Expand 10 after
2468 2498
2469 2499
2470 void RegisterAllocator::SetLiveRangeAssignedRegister(LiveRange* range, 2500 void RegisterAllocator::SetLiveRangeAssignedRegister(LiveRange* range,
2471 int reg) { 2501 int reg) {
2472 if (range->Kind() == DOUBLE_REGISTERS) { 2502 if (range->Kind() == DOUBLE_REGISTERS) {
2473 assigned_double_registers_->Add(reg); 2503 assigned_double_registers_->Add(reg);
2474 } else { 2504 } else {
2475 DCHECK(range->Kind() == GENERAL_REGISTERS); 2505 DCHECK(range->Kind() == GENERAL_REGISTERS);
2476 assigned_registers_->Add(reg); 2506 assigned_registers_->Add(reg);
2477 } 2507 }
2478 range->set_assigned_register(reg, code_zone()); 2508 range->set_assigned_register(reg, operand_cache());
2479 } 2509 }
2480 2510
2481 } // namespace compiler 2511 } // namespace compiler
2482 } // namespace internal 2512 } // namespace internal
2483 } // namespace v8 2513 } // namespace v8
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