Make instruction counter in simulators 64-bit (issue 22302).

runtime/vm/simulator_arm64.cc

 // Copyright (c) 2014, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include <setjmp.h>  // NOLINT
 #include <stdlib.h>
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM64)
 
 // Only build the simulator if not compiling for real ARM hardware.
 #if !defined(HOST_ARCH_ARM64)
 
 #include "vm/simulator.h"
 
 #include "vm/assembler.h"
 #include "vm/constants_arm64.h"
 #include "vm/disassembler.h"
 #include "vm/lockers.h"
 #include "vm/native_arguments.h"
 #include "vm/stack_frame.h"
 #include "vm/os_thread.h"
 
 namespace dart {
 
-DEFINE_FLAG(int, trace_sim_after, -1,
+DEFINE_FLAG(uint64_t, trace_sim_after, ULLONG_MAX,
             "Trace simulator execution after instruction count reached.");
-DEFINE_FLAG(int, stop_sim_at, -1,
+DEFINE_FLAG(uint64_t, stop_sim_at, ULLONG_MAX,
             "Instruction address or instruction count to stop simulator at.");
 
 
 // This macro provides a platform independent use of sscanf. The reason for
 // SScanF not being implemented in a platform independent way through
 // OS in the same way as SNPrint is that the Windows C Run-Time
 // Library does not provide vsscanf.
 #define SScanF sscanf  // NOLINT
 
 
@@ skipping 152 matching lines @@
         return false;
       }
       *value = *(reinterpret_cast<int64_t*>(addr));
       return true;
     }
   }
   if (strcmp("pc", desc) == 0) {
     *value = sim_->get_pc();
     return true;
   }
-  if (strcmp("icount", desc) == 0) {
-    *value = sim_->get_icount();
-    return true;
-  }
   bool retval = SScanF(desc, "0x%"Px64, value) == 1;
   if (!retval) {
     retval = SScanF(desc, "%"Px64, value) == 1;
   }
   return retval;
 }
 
 
 bool SimulatorDebugger::GetSValue(char* desc, uint32_t* value) {
   VRegister vreg = LookupVRegisterByName(desc);
@@ skipping 259 matching lines @@
       } else if ((strcmp(cmd, "si") == 0) || (strcmp(cmd, "stepi") == 0)) {
         sim_->InstructionDecode(reinterpret_cast<Instr*>(sim_->get_pc()));
       } else if ((strcmp(cmd, "c") == 0) || (strcmp(cmd, "cont") == 0)) {
         // Execute the one instruction we broke at with breakpoints disabled.
         sim_->InstructionDecode(reinterpret_cast<Instr*>(sim_->get_pc()));
         // Leave the debugger shell.
         done = true;
       } else if ((strcmp(cmd, "p") == 0) || (strcmp(cmd, "print") == 0)) {
         if (args == 2) {
           uint64_t value;
-          if (GetValue(arg1, &value)) {
+          if (strcmp(arg1, "icount") == 0) {
+            value = sim_->get_icount();
+            OS::Print("icount: %"Pu64" 0x%"Px64"\n", value, value);
+          } else if (GetValue(arg1, &value)) {
             OS::Print("%s: %"Pu64" 0x%"Px64"\n", arg1, value, value);
           } else {
             OS::Print("%s unrecognized\n", arg1);
           }
         } else {
-          OS::Print("print <reg or value or *addr>\n");
+          OS::Print("print <reg or icount or value or *addr>\n");
         }
       } else if ((strcmp(cmd, "pf") == 0) ||
                  (strcmp(cmd, "printfloat") == 0)) {
         if (args == 2) {
           uint32_t value;
           if (GetSValue(arg1, &value)) {
             float svalue = bit_cast<float, uint32_t>(value);
             OS::Print("%s: %d 0x%x %.8g\n",
                 arg1, value, value, svalue);
           } else {
@@ skipping 133 matching lines @@
         OS::Print("V flag: %d\n", sim_->v_flag_);
       } else if (strcmp(cmd, "unstop") == 0) {
         intptr_t stop_pc = sim_->get_pc() - Instr::kInstrSize;
         Instr* stop_instr = reinterpret_cast<Instr*>(stop_pc);
         if (stop_instr->IsExceptionGenOp()) {
           stop_instr->SetInstructionBits(Instr::kNopInstruction);
         } else {
           OS::Print("Not at debugger stop.\n");
         }
       } else if (strcmp(cmd, "trace") == 0) {
-        if (FLAG_trace_sim_after == -1) {
+        if (FLAG_trace_sim_after == ULLONG_MAX) {
           FLAG_trace_sim_after = sim_->get_icount();
           OS::Print("execution tracing on\n");
         } else {
-          FLAG_trace_sim_after = -1;
+          FLAG_trace_sim_after = ULLONG_MAX;
           OS::Print("execution tracing off\n");
         }
       } else if (strcmp(cmd, "bt") == 0) {
         PrintBacktrace();
       } else {
         OS::Print("Unknown command: %s\n", cmd);
       }
     }
     delete[] line;
   }
@@ skipping 398 matching lines @@
 // validity.
 uword Simulator::StackTop() const {
   // To be safe in potential stack underflows we leave some buffer above and
   // set the stack top.
   return reinterpret_cast<uword>(stack_) +
       (Isolate::GetSpecifiedStackSize() + Isolate::kStackSizeBuffer);
 }
 
 
 bool Simulator::IsTracingExecution() const {
-  // Integer flag values are signed, so we must cast to unsigned.
-  // The default of -1 hence becomes the maximum unsigned value.
-  return (static_cast<uintptr_t>(icount_) >
-          static_cast<uintptr_t>(FLAG_trace_sim_after));
+  return icount_ > FLAG_trace_sim_after;
 }
 
 
 intptr_t Simulator::ReadX(uword addr, Instr* instr) {
   if ((addr & 7) == 0) {
     intptr_t* ptr = reinterpret_cast<intptr_t*>(addr);
     return *ptr;
   }
   UnalignedAccess("read", addr, instr);
   return 0;
@@ skipping 2219 matching lines @@
   } else {
     UnimplementedInstruction(instr);
   }
 }
 
 
 // Executes the current instruction.
 void Simulator::InstructionDecode(Instr* instr) {
   pc_modified_ = false;
   if (IsTracingExecution()) {
-    OS::Print("%" Pd " ", icount_);
+    OS::Print("%"Pu64, icount_);
     const uword start = reinterpret_cast<uword>(instr);
     const uword end = start + Instr::kInstrSize;
     Disassembler::Disassemble(start, end);
   }
 
   if (instr->IsDPImmediateOp()) {
     DecodeDPImmediate(instr);
   } else if (instr->IsCompareBranchOp()) {
     DecodeCompareBranch(instr);
   } else if (instr->IsLoadStoreOp()) {
@@ skipping 12 matching lines @@
     set_pc(reinterpret_cast<int64_t>(instr) + Instr::kInstrSize);
   }
 }
 
 
 void Simulator::Execute() {
   // Get the PC to simulate. Cannot use the accessor here as we need the
   // raw PC value and not the one used as input to arithmetic instructions.
   uword program_counter = get_pc();
 
-  if (FLAG_stop_sim_at == 0) {
+  if (FLAG_stop_sim_at == ULLONG_MAX) {
     // Fast version of the dispatch loop without checking whether the simulator
     // should be stopping at a particular executed instruction.
     while (program_counter != kEndSimulatingPC) {
       Instr* instr = reinterpret_cast<Instr*>(program_counter);
       icount_++;
       if (IsIllegalAddress(program_counter)) {
         HandleIllegalAccess(program_counter, instr);
       } else {
         InstructionDecode(instr);
       }
       program_counter = get_pc();
     }
   } else {
     // FLAG_stop_sim_at is at the non-default value. Stop in the debugger when
     // we reach the particular instruction count or address.
     while (program_counter != kEndSimulatingPC) {
       Instr* instr = reinterpret_cast<Instr*>(program_counter);
       icount_++;
-      if (static_cast<intptr_t>(icount_) == FLAG_stop_sim_at) {
+      if (icount_ == FLAG_stop_sim_at) {
         SimulatorDebugger dbg(this);
         dbg.Stop(instr, "Instruction count reached");
-      } else if (reinterpret_cast<intptr_t>(instr) == FLAG_stop_sim_at) {
+      } else if (reinterpret_cast<uint64_t>(instr) == FLAG_stop_sim_at) {
         SimulatorDebugger dbg(this);
         dbg.Stop(instr, "Instruction address reached");
       } else if (IsIllegalAddress(program_counter)) {
         HandleIllegalAccess(program_counter, instr);
       } else {
         InstructionDecode(instr);
       }
       program_counter = get_pc();
     }
   }
@@ skipping 129 matching lines @@
   set_register(NULL, kExceptionObjectReg, bit_cast<int64_t>(raw_exception));
   set_register(NULL, kStackTraceObjectReg, bit_cast<int64_t>(raw_stacktrace));
   buf->Longjmp();
 }
 
 }  // namespace dart
 
 #endif  // !defined(HOST_ARCH_ARM64)
 
 #endif  // defined TARGET_ARCH_ARM64