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Issue 895603002: VM: Improve polymorphic check-class in optimized code. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 5 years, 10 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM. 5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM.
6 #if defined(TARGET_ARCH_ARM) 6 #if defined(TARGET_ARCH_ARM)
7 7
8 #include "vm/intermediate_language.h" 8 #include "vm/intermediate_language.h"
9 9
10 #include "vm/cpu.h" 10 #include "vm/cpu.h"
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6022 reinterpret_cast<intptr_t>(Object::null())); 6022 reinterpret_cast<intptr_t>(Object::null()));
6023 __ b(deopt, EQ); 6023 __ b(deopt, EQ);
6024 return; 6024 return;
6025 } 6025 }
6026 6026
6027 ASSERT((unary_checks().GetReceiverClassIdAt(0) != kSmiCid) || 6027 ASSERT((unary_checks().GetReceiverClassIdAt(0) != kSmiCid) ||
6028 (unary_checks().NumberOfChecks() > 1)); 6028 (unary_checks().NumberOfChecks() > 1));
6029 const Register value = locs()->in(0).reg(); 6029 const Register value = locs()->in(0).reg();
6030 const Register temp = locs()->temp(0).reg(); 6030 const Register temp = locs()->temp(0).reg();
6031 Label is_ok; 6031 Label is_ok;
6032 intptr_t cix = 0; 6032 if (unary_checks().GetReceiverClassIdAt(0) == kSmiCid) {
6033 if (unary_checks().GetReceiverClassIdAt(cix) == kSmiCid) {
6034 __ tst(value, Operand(kSmiTagMask)); 6033 __ tst(value, Operand(kSmiTagMask));
6035 __ b(&is_ok, EQ); 6034 __ b(&is_ok, EQ);
6036 cix++; // Skip first check.
6037 } else { 6035 } else {
6038 __ tst(value, Operand(kSmiTagMask)); 6036 __ tst(value, Operand(kSmiTagMask));
6039 __ b(deopt, EQ); 6037 __ b(deopt, EQ);
6040 } 6038 }
6041 __ LoadClassId(temp, value); 6039 __ LoadClassId(temp, value);
6042 6040
6043 if (IsDenseSwitch()) { 6041 if (IsDenseSwitch()) {
6044 ASSERT(cids_[0] < cids_[cids_.length() - 1]); 6042 ASSERT(cids_[0] < cids_[cids_.length() - 1]);
6045 __ AddImmediate(temp, -cids_[0]); 6043 __ AddImmediate(temp, -cids_[0]);
6046 __ CompareImmediate(temp, cids_[cids_.length() - 1] - cids_[0]); 6044 __ CompareImmediate(temp, cids_[cids_.length() - 1] - cids_[0]);
6047 __ b(deopt, HI); 6045 __ b(deopt, HI);
6048 6046
6049 intptr_t mask = ComputeCidMask(); 6047 intptr_t mask = ComputeCidMask();
6050 if (!IsDenseMask(mask)) { 6048 if (!IsDenseMask(mask)) {
6051 // Only need mask if there are missing numbers in the range. 6049 // Only need mask if there are missing numbers in the range.
6052 ASSERT(cids_.length() > 2); 6050 ASSERT(cids_.length() > 2);
6053 Register mask_reg = locs()->temp(1).reg(); 6051 Register mask_reg = locs()->temp(1).reg();
6054 __ LoadImmediate(mask_reg, 1); 6052 __ LoadImmediate(mask_reg, 1);
6055 __ Lsl(mask_reg, mask_reg, temp); 6053 __ Lsl(mask_reg, mask_reg, temp);
6056 __ TestImmediate(mask_reg, mask); 6054 __ TestImmediate(mask_reg, mask);
6057 __ b(deopt, EQ); 6055 __ b(deopt, EQ);
6058 } 6056 }
6059 } else { 6057 } else {
6060 const intptr_t num_checks = unary_checks().NumberOfChecks(); 6058 GrowableArray<CidTarget> sorted_ic_data;
6061 for (intptr_t i = cix; i < num_checks; i++) { 6059 FlowGraphCompiler::SortICDataByCount(unary_checks(),
6062 ASSERT(unary_checks().GetReceiverClassIdAt(i) != kSmiCid); 6060 &sorted_ic_data,
6063 __ CompareImmediate(temp, unary_checks().GetReceiverClassIdAt(i)); 6061 /* drop_smi = */ true);
6062 const intptr_t num_checks = sorted_ic_data.length();
6063 for (intptr_t i = 0; i < num_checks; i++) {
6064 const intptr_t cid = sorted_ic_data[i].cid;
6065 ASSERT(cid != kSmiCid);
6066 __ CompareImmediate(temp, cid);
6064 if (i == (num_checks - 1)) { 6067 if (i == (num_checks - 1)) {
6065 __ b(deopt, NE); 6068 __ b(deopt, NE);
6066 } else { 6069 } else {
6067 __ b(&is_ok, EQ); 6070 __ b(&is_ok, EQ);
6068 } 6071 }
6069 } 6072 }
6070 } 6073 }
6071 __ Bind(&is_ok); 6074 __ Bind(&is_ok);
6072 } 6075 }
6073 6076
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6962 1, 6965 1,
6963 locs()); 6966 locs());
6964 __ Drop(1); 6967 __ Drop(1);
6965 __ Pop(result); 6968 __ Pop(result);
6966 } 6969 }
6967 6970
6968 6971
6969 } // namespace dart 6972 } // namespace dart
6970 6973
6971 #endif // defined TARGET_ARCH_ARM 6974 #endif // defined TARGET_ARCH_ARM
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