[arm] Assembler support for internal references.

src/arm/assembler-arm.cc

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions
 // are met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 210 matching lines @@
   DCHECK(kScratchDoubleReg.code() - kDoubleRegZero.code() ==
          kNumReservedRegisters - 1);
   if (index >= kDoubleRegZero.code()) index += kNumReservedRegisters;
   return VFPRegisters::Name(index, true);
 }
 
 
 // -----------------------------------------------------------------------------
 // Implementation of RelocInfo
 
-const int RelocInfo::kApplyMask = 0;
+// static
+const int RelocInfo::kApplyMask = 1 << RelocInfo::INTERNAL_REFERENCE;
 
 
 bool RelocInfo::IsCodedSpecially() {
   // The deserializer needs to know whether a pointer is specially coded.  Being
   // specially coded on ARM means that it is a movw/movt instruction, or is an
   // out of line constant pool entry.  These only occur if
   // FLAG_enable_ool_constant_pool is true.
   return FLAG_enable_ool_constant_pool;
 }
 
@@ skipping 547 matching lines @@
 // The link chain is terminated by a branch offset pointing to the
 // same position.
 
 
 int Assembler::target_at(int pos) {
   Instr instr = instr_at(pos);
   if (is_uint24(instr)) {
     // Emitted link to a label, not part of a branch.
     return instr;
   }
-  DCHECK((instr & 7*B25) == 5*B25);  // b, bl, or blx imm24
-  int imm26 = ((instr & kImm24Mask) << 8) >> 6;
-  if ((Instruction::ConditionField(instr) == kSpecialCondition) &&
-      ((instr & B24) != 0)) {
-    // blx uses bit 24 to encode bit 2 of imm26
-    imm26 += 2;
+  if ((instr & 7 * B25) == 5 * B25) {
+    int imm26 = ((instr & kImm24Mask) << 8) >> 6;
+    // b, bl, or blx imm24
+    if ((Instruction::ConditionField(instr) == kSpecialCondition) &&
+        ((instr & B24) != 0)) {
+      // blx uses bit 24 to encode bit 2 of imm26
+      imm26 += 2;
+    }
+    return pos + kPcLoadDelta + imm26;
   }
-  return pos + kPcLoadDelta + imm26;
+  // Internal reference to the label.
+  DCHECK_EQ(7 * B25 | 1 * B0, instr & (7 * B25 | 1 * B0));
+  int imm26 = (((instr >> 1) & kImm24Mask) << 8) >> 6;
+  return pos + imm26;
 }
 
 
 void Assembler::target_at_put(int pos, int target_pos) {
   Instr instr = instr_at(pos);
   if (is_uint24(instr)) {
     DCHECK(target_pos == pos || target_pos >= 0);
     // Emitted link to a label, not part of a branch.
     // Load the position of the label relative to the generated code object
     // pointer in a register.
@@ skipping 53 matching lines @@
                               3,
                               CodePatcher::DONT_FLUSH);
           patcher.masm()->mov(dst, Operand(target8_0));
           patcher.masm()->orr(dst, dst, Operand(target8_1 << 8));
           patcher.masm()->orr(dst, dst, Operand(target8_2 << 16));
         }
       }
     }
     return;
   }
-  int imm26 = target_pos - (pos + kPcLoadDelta);
-  DCHECK((instr & 7*B25) == 5*B25);  // b, bl, or blx imm24
-  if (Instruction::ConditionField(instr) == kSpecialCondition) {
-    // blx uses bit 24 to encode bit 2 of imm26
-    DCHECK((imm26 & 1) == 0);
-    instr = (instr & ~(B24 | kImm24Mask)) | ((imm26 & 2) >> 1)*B24;
-  } else {
-    DCHECK((imm26 & 3) == 0);
-    instr &= ~kImm24Mask;
+  if ((instr & 7 * B25) == 5 * B25) {
+    // b, bl, or blx imm24
+    int imm26 = target_pos - (pos + kPcLoadDelta);
+    if (Instruction::ConditionField(instr) == kSpecialCondition) {
+      // blx uses bit 24 to encode bit 2 of imm26
+      DCHECK((imm26 & 1) == 0);
+      instr = (instr & ~(B24 | kImm24Mask)) | ((imm26 & 2) >> 1) * B24;
+    } else {
+      DCHECK((imm26 & 3) == 0);
+      instr &= ~kImm24Mask;
+    }
+    int imm24 = imm26 >> 2;
+    DCHECK(is_int24(imm24));
+    instr_at_put(pos, instr | (imm24 & kImm24Mask));
+    return;
   }
-  int imm24 = imm26 >> 2;
-  DCHECK(is_int24(imm24));
-  instr_at_put(pos, instr | (imm24 & kImm24Mask));
+  // Patch internal reference to label.
+  DCHECK_EQ(7 * B25 | 1 * B0, instr & (7 * B25 | 1 * B0));
+  instr_at_put(pos, reinterpret_cast<Instr>(buffer_ + target_pos));
 }
 
 
 void Assembler::print(Label* L) {
   if (L->is_unused()) {
     PrintF("unused label\n");
   } else if (L->is_bound()) {
     PrintF("bound label to %d\n", L->pos());
   } else if (L->is_linked()) {
     Label l = *L;
@@ skipping 2516 matching lines @@
           desc.reloc_size);
 
   // Switch buffers.
   DeleteArray(buffer_);
   buffer_ = desc.buffer;
   buffer_size_ = desc.buffer_size;
   pc_ += pc_delta;
   reloc_info_writer.Reposition(reloc_info_writer.pos() + rc_delta,
                                reloc_info_writer.last_pc() + pc_delta);
 
-  // None of our relocation types are pc relative pointing outside the code
-  // buffer nor pc absolute pointing inside the code buffer, so there is no need
-  // to relocate any emitted relocation entries.
+  // Relocate internal references.
+  for (RelocIterator it(desc); !it.done(); it.next()) {
+    if (it.rinfo()->rmode() == RelocInfo::INTERNAL_REFERENCE) {
+      // Don't patch unbound internal references (bit 0 set); those are still
+      // hooked up in the Label chain and will be automatically patched once
+      // the label is bound.
+      int32_t* p = reinterpret_cast<int32_t*>(it.rinfo()->pc());
+      if ((*p & 1 * B0) == 0) *p += pc_delta;
+    }
+  }
 
   // Relocate pending relocation entries.
   for (int i = 0; i < num_pending_32_bit_reloc_info_; i++) {
     RelocInfo& rinfo = pending_32_bit_reloc_info_[i];
     DCHECK(rinfo.rmode() != RelocInfo::COMMENT &&
            rinfo.rmode() != RelocInfo::POSITION);
     if (rinfo.rmode() != RelocInfo::JS_RETURN) {
       rinfo.set_pc(rinfo.pc() + pc_delta);
     }
   }
@@ skipping 23 matching lines @@
   // to write pure data with no pointers and the constant pool should
   // be emitted before using dd.
   DCHECK(num_pending_32_bit_reloc_info_ == 0);
   DCHECK(num_pending_64_bit_reloc_info_ == 0);
   CheckBuffer();
   *reinterpret_cast<uint32_t*>(pc_) = data;
   pc_ += sizeof(uint32_t);
 }
 
 
+void Assembler::dd(Label* label) {
+  CheckBuffer();
+  RecordRelocInfo(RelocInfo::INTERNAL_REFERENCE);
+  if (label->is_bound()) {
+    uint32_t data = reinterpret_cast<uint32_t>(buffer_ + label->pos());
+    DCHECK_EQ(0u, data & 1 * B0);
+    *reinterpret_cast<uint32_t*>(pc_) = data;
+    pc_ += sizeof(uint32_t);
+  } else {
+    int target_pos;
+    if (label->is_linked()) {
+      // Point to previous instruction that uses the link.
+      target_pos = label->pos();
+    } else {
+      // First entry of the link chain points to itself.
+      target_pos = pc_offset();
+    }
+    label->link_to(pc_offset());
+    // Encode internal reference to unbound label. We set the least significant
+    // bit to distinguish unbound internal references in GrowBuffer() below.
+    int imm26 = target_pos - pc_offset();
+    DCHECK_EQ(0, imm26 & 3);
+    int imm24 = imm26 >> 2;
+    DCHECK(is_int24(imm24));
+    // We use bit pattern 0000111<imm24>1 because that doesn't match any branch
+    // or load that would also appear on the label chain.
+    emit(7 * B25 | ((imm24 & kImm24Mask) << 1) | 1 * B0);
+  }
+}
+
+
 void Assembler::emit_code_stub_address(Code* stub) {
   CheckBuffer();
   *reinterpret_cast<uint32_t*>(pc_) =
       reinterpret_cast<uint32_t>(stub->instruction_start());
   pc_ += sizeof(uint32_t);
 }
 
 
 void Assembler::RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data) {
   RelocInfo rinfo(pc_, rmode, data, NULL);
@@ skipping 501 matching lines @@
       assm->instr_at_put(
           rinfo.pc(), Assembler::SetLdrRegisterImmediateOffset(instr, offset));
     }
   }
 }
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_ARM