store InstructionOperands directly in Instruction

src/compiler/instruction.h

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef V8_COMPILER_INSTRUCTION_H_
 #define V8_COMPILER_INSTRUCTION_H_
 
 #include <deque>
 #include <iosfwd>
 #include <map>
@@ skipping 54 matching lines @@
     value_ = KindField::encode(kind);
     value_ |= bit_cast<unsigned>(index << KindField::kSize);
     DCHECK(this->index() == index);
   }
 
   // Calls SetUpCache()/TearDownCache() for each subclass.
   static void SetUpCaches();
   static void TearDownCaches();
 
  protected:
+  // TODO(dcarney): remove.  used to construct the Instruction operand array.
+  InstructionOperand() : value_(0xffffffff) {}
   typedef BitField<Kind, 0, 3> KindField;
 
   uint32_t value_;
 };
 
 typedef ZoneVector<InstructionOperand*> InstructionOperandVector;
 
 struct PrintableInstructionOperand {
   const RegisterConfiguration* register_configuration_;
   const InstructionOperand* op_;
@@ skipping 171 matching lines @@
   int32_t virtual_register() const { return virtual_register_; }
   void set_virtual_register(int32_t id) { virtual_register_ = id; }
 
   // [lifetime]: Only for non-FIXED_SLOT.
   bool IsUsedAtStart() const {
     DCHECK(basic_policy() == EXTENDED_POLICY);
     return LifetimeField::decode(value_) == USED_AT_START;
   }
 
  private:
+  friend class Instruction;
+  UnallocatedOperand()
+      : InstructionOperand(), virtual_register_(kInvalidVirtualRegister) {}
+
   // TODO(dcarney): this should really be unsigned.
   int32_t virtual_register_;
 };
 
 
 class MoveOperands FINAL {
  public:
   MoveOperands(InstructionOperand* source, InstructionOperand* destination)
       : source_(source), destination_(destination) {}
 
@@ skipping 139 matching lines @@
   ZoneList<InstructionOperand*> untagged_operands_;
   int instruction_position_;
 };
 
 std::ostream& operator<<(std::ostream& os, const PointerMap& pm);
 
 // TODO(titzer): s/PointerMap/ReferenceMap/
 class Instruction : public ZoneObject {
  public:
   size_t OutputCount() const { return OutputCountField::decode(bit_field_); }
-  InstructionOperand* OutputAt(size_t i) const {
+  const InstructionOperand* OutputAt(size_t i) const {
     DCHECK(i < OutputCount());
-    return operands_[i];
+    return &operands_[i];
+  }
+  InstructionOperand* OutputAt(size_t i) {
+    DCHECK(i < OutputCount());
+    return &operands_[i];
   }
 
   bool HasOutput() const { return OutputCount() == 1; }
-  InstructionOperand* Output() const { return OutputAt(0); }
+  const InstructionOperand* Output() const { return OutputAt(0); }
+  InstructionOperand* Output() { return OutputAt(0); }
 
   size_t InputCount() const { return InputCountField::decode(bit_field_); }
-  InstructionOperand* InputAt(size_t i) const {
+  const InstructionOperand* InputAt(size_t i) const {
     DCHECK(i < InputCount());
-    return operands_[OutputCount() + i];
+    return &operands_[OutputCount() + i];
   }
-  void SetInputAt(size_t i, InstructionOperand* operand) {
+  InstructionOperand* InputAt(size_t i) {
     DCHECK(i < InputCount());
-    operands_[OutputCount() + i] = operand;
+    return &operands_[OutputCount() + i];
   }
 
   size_t TempCount() const { return TempCountField::decode(bit_field_); }
-  InstructionOperand* TempAt(size_t i) const {
+  const InstructionOperand* TempAt(size_t i) const {
     DCHECK(i < TempCount());
-    return operands_[OutputCount() + InputCount() + i];
+    return &operands_[OutputCount() + InputCount() + i];
+  }
+  InstructionOperand* TempAt(size_t i) {
+    DCHECK(i < TempCount());
+    return &operands_[OutputCount() + InputCount() + i];
   }
 
   InstructionCode opcode() const { return opcode_; }
   ArchOpcode arch_opcode() const { return ArchOpcodeField::decode(opcode()); }
   AddressingMode addressing_mode() const {
     return AddressingModeField::decode(opcode());
   }
   FlagsMode flags_mode() const { return FlagsModeField::decode(opcode()); }
   FlagsCondition flags_condition() const {
     return FlagsConditionField::decode(opcode());
   }
 
   // TODO(titzer): make control and call into flags.
   static Instruction* New(Zone* zone, InstructionCode opcode) {
     return New(zone, opcode, 0, NULL, 0, NULL, 0, NULL);
   }
 
   static Instruction* New(Zone* zone, InstructionCode opcode,
                           size_t output_count, InstructionOperand** outputs,
                           size_t input_count, InstructionOperand** inputs,
                           size_t temp_count, InstructionOperand** temps) {
     DCHECK(opcode >= 0);
     DCHECK(output_count == 0 || outputs != NULL);
     DCHECK(input_count == 0 || inputs != NULL);
     DCHECK(temp_count == 0 || temps != NULL);
-    InstructionOperand* none = NULL;
-    USE(none);
-    int size = static_cast<int>(RoundUp(sizeof(Instruction), kPointerSize) +
-                                (output_count + input_count + temp_count - 1) *
-                                    sizeof(none));
+    size_t total_extra_ops = output_count + input_count + temp_count;
+    if (total_extra_ops != 0) total_extra_ops--;
+    int size = static_cast<int>(
+        RoundUp(sizeof(Instruction), sizeof(UnallocatedOperand)) +
+        total_extra_ops * sizeof(UnallocatedOperand));
     return new (zone->New(size)) Instruction(
         opcode, output_count, outputs, input_count, inputs, temp_count, temps);
   }
 
   // TODO(titzer): another holdover from lithium days; register allocator
   // should not need to know about control instructions.
   Instruction* MarkAsControl() {
     bit_field_ = IsControlField::update(bit_field_, true);
     return this;
   }
@@ skipping 33 matching lines @@
     bit_field_ = 0;
     pointer_map_ = NULL;
   }
 
   bool IsNop() const {
     return arch_opcode() == kArchNop && InputCount() == 0 &&
            OutputCount() == 0 && TempCount() == 0;
   }
 
  protected:
-  explicit Instruction(InstructionCode opcode)
-      : opcode_(opcode),
-        bit_field_(OutputCountField::encode(0) | InputCountField::encode(0) |
-                   TempCountField::encode(0) | IsCallField::encode(false) |
-                   IsControlField::encode(false)),
-        pointer_map_(NULL) {}
-
+  explicit Instruction(InstructionCode opcode);
   Instruction(InstructionCode opcode, size_t output_count,
               InstructionOperand** outputs, size_t input_count,
               InstructionOperand** inputs, size_t temp_count,
-              InstructionOperand** temps)
-      : opcode_(opcode),
-        bit_field_(OutputCountField::encode(output_count) |
-                   InputCountField::encode(input_count) |
-                   TempCountField::encode(temp_count) |
-                   IsCallField::encode(false) | IsControlField::encode(false)),
-        pointer_map_(NULL) {
-    for (size_t i = 0; i < output_count; ++i) {
-      operands_[i] = outputs[i];
-    }
-    for (size_t i = 0; i < input_count; ++i) {
-      operands_[output_count + i] = inputs[i];
-    }
-    for (size_t i = 0; i < temp_count; ++i) {
-      operands_[output_count + input_count + i] = temps[i];
-    }
-  }
+              InstructionOperand** temps);
 
  protected:
   typedef BitField<size_t, 0, 8> OutputCountField;
   typedef BitField<size_t, 8, 16> InputCountField;
   typedef BitField<size_t, 24, 6> TempCountField;
   typedef BitField<bool, 30, 1> IsCallField;
   typedef BitField<bool, 31, 1> IsControlField;
 
   InstructionCode opcode_;
   uint32_t bit_field_;
   PointerMap* pointer_map_;
-  InstructionOperand* operands_[1];
+  UnallocatedOperand operands_[1];
 };
 
 
 struct PrintableInstruction {
   const RegisterConfiguration* register_configuration_;
   const Instruction* instr_;
 };
 std::ostream& operator<<(std::ostream& os, const PrintableInstruction& instr);
 
 
@@ skipping 483 matching lines @@
 
 
 std::ostream& operator<<(std::ostream& os,
                          const PrintableInstructionSequence& code);
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_COMPILER_INSTRUCTION_H_