Update to opus-HEAD-66611f1.

celt/x86/x86_celt_map.c

Index: celt/x86/x86_celt_map.c
diff --git a/celt/arm/arm_celt_map.c b/celt/x86/x86_celt_map.c
similarity index 54%
copy from celt/arm/arm_celt_map.c
copy to celt/x86/x86_celt_map.c
index 547a84d14959adb1480af4a76665ae42892b700e..83410dbce31233ff94734490efa918eb85ab2df7 100644
--- a/celt/arm/arm_celt_map.c
+++ b/celt/x86/x86_celt_map.c
@@ -1,6 +1,6 @@
-/* Copyright (c) 2010 Xiph.Org Foundation
- * Copyright (c) 2013 Parrot */
-/*
+/* Copyright (c) 2014, Cisco Systems, INC
+   Written by XiangMingZhu WeiZhou MinPeng YanWang
+
    Redistribution and use in source and binary forms, with or without
    modification, are permitted provided that the following conditions
    are met:
@@ -25,24 +25,59 @@
    SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
-#ifdef HAVE_CONFIG_H
+#if defined(HAVE_CONFIG_H)
 #include "config.h"
 #endif
 
+#include "x86/x86cpu.h"
+#include "celt_lpc.h"
 #include "pitch.h"
+#include "pitch_sse.h"
 
 #if defined(OPUS_HAVE_RTCD)
 
 # if defined(FIXED_POINT)
-opus_val32 (*const CELT_PITCH_XCORR_IMPL[OPUS_ARCHMASK+1])(const opus_val16 *,
-    const opus_val16 *, opus_val32 *, int , int) = {
-  celt_pitch_xcorr_c,               /* ARMv4 */
-  MAY_HAVE_EDSP(celt_pitch_xcorr),  /* EDSP */
-  MAY_HAVE_MEDIA(celt_pitch_xcorr), /* Media */
-  MAY_HAVE_NEON(celt_pitch_xcorr)   /* NEON */
+
+void (*const CELT_FIR_IMPL[OPUS_ARCHMASK + 1])(
+         const opus_val16 *x,
+         const opus_val16 *num,
+         opus_val16       *y,
+         int              N,
+         int              ord,
+         opus_val16       *mem,
+         int              arch
+) = {
+  celt_fir_c,                /* non-sse */
+  celt_fir_c,
+  MAY_HAVE_SSE4_1(celt_fir), /* sse4.1  */
+  NULL
+};
+
+void (*const XCORR_KERNEL_IMPL[OPUS_ARCHMASK + 1])(
+         const opus_val16 *x,
+         const opus_val16 *y,
+         opus_val32       sum[4],
+         int              len
+) = {
+  xcorr_kernel_c,                /* non-sse */
+  xcorr_kernel_c,
+  MAY_HAVE_SSE4_1(xcorr_kernel), /* sse4.1  */
+  NULL
 };
+
+opus_val32 (*const CELT_INNER_PROD_IMPL[OPUS_ARCHMASK + 1])(
+         const opus_val16 *x,
+         const opus_val16 *y,
+         int              N
+) = {
+  celt_inner_prod_c,                /* non-sse */
+  MAY_HAVE_SSE2(celt_inner_prod),
+  MAY_HAVE_SSE4_1(celt_inner_prod), /* sse4.1  */
+  NULL
+};
+
 # else
-#  error "Floating-point implementation is not supported by ARM asm yet." \
+#  error "Floating-point implementation is not supported by x86 RTCD yet." \
  "Reconfigure with --disable-rtcd or send patches."
 # endif