Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(147)

Side by Side Diff: celt/mips/vq_mipsr1.h

Issue 882843002: Update to opus-HEAD-66611f1. (Closed) Base URL: https://chromium.googlesource.com/chromium/deps/opus.git@master
Patch Set: Add the contents of Makefile.mips back. Created 5 years, 10 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « celt/mips/pitch_mipsr1.h ('k') | celt/modes.h » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
(Empty)
1 /* Copyright (c) 2007-2008 CSIRO
2 Copyright (c) 2007-2009 Xiph.Org Foundation
3 Written by Jean-Marc Valin */
4 /*
5 Redistribution and use in source and binary forms, with or without
6 modification, are permitted provided that the following conditions
7 are met:
8
9 - Redistributions of source code must retain the above copyright
10 notice, this list of conditions and the following disclaimer.
11
12 - Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in the
14 documentation and/or other materials provided with the distribution.
15
16 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
20 OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
21 EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
22 PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
23 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
24 LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
25 NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
26 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #ifndef __VQ_MIPSR1_H__
30 #define __VQ_MIPSR1_H__
31
32 #ifdef HAVE_CONFIG_H
33 #include "config.h"
34 #endif
35
36 #include "mathops.h"
37 #include "cwrs.h"
38 #include "vq.h"
39 #include "arch.h"
40 #include "os_support.h"
41 #include "bands.h"
42 #include "rate.h"
43
44 static unsigned extract_collapse_mask(int *iy, int N, int B);
45 static void normalise_residual(int * OPUS_RESTRICT iy, celt_norm * OPUS_RESTRICT X, int N, opus_val32 Ryy, opus_val16 gain);
46 static void exp_rotation(celt_norm *X, int len, int dir, int stride, int K, int spread);
47
48 #define OVERRIDE_vq_exp_rotation1
49 static void exp_rotation1(celt_norm *X, int len, int stride, opus_val16 c, opus_ val16 s)
50 {
51 int i;
52 opus_val16 ms;
53 celt_norm *Xptr;
54 Xptr = X;
55 ms = NEG16(s);
56 for (i=0;i<len-stride;i++)
57 {
58 celt_norm x1, x2;
59 x1 = Xptr[0];
60 x2 = Xptr[stride];
61 Xptr[stride] = EXTRACT16(PSHR32(MAC16_16(MULT16_16(c, x2), s, x1), 15));
62 *Xptr++ = EXTRACT16(PSHR32(MAC16_16(MULT16_16(c, x1), ms, x2), 15));
63 }
64 Xptr = &X[len-2*stride-1];
65 for (i=len-2*stride-1;i>=0;i--)
66 {
67 celt_norm x1, x2;
68 x1 = Xptr[0];
69 x2 = Xptr[stride];
70 Xptr[stride] = EXTRACT16(PSHR32(MAC16_16(MULT16_16(c, x2), s, x1), 15));
71 *Xptr-- = EXTRACT16(PSHR32(MAC16_16(MULT16_16(c, x1), ms, x2), 15));
72 }
73 }
74
75 #define OVERRIDE_renormalise_vector
76
77 #define renormalise_vector(X, N, gain, arch) \
78 ((void)(arch), renormalize_vector_mips(x, N, gain))
79
80 void renormalise_vector_mips(celt_norm *X, int N, opus_val16 gain)
81 {
82 int i;
83 #ifdef FIXED_POINT
84 int k;
85 #endif
86 opus_val32 E = EPSILON;
87 opus_val16 g;
88 opus_val32 t;
89 celt_norm *xptr = X;
90
91 int X0, X2, X3, X1;
92 asm volatile("mult $ac1, $0, $0");
93 asm volatile("MTLO %0, $ac1" : :"r" (E));
94 /*if(N %4)
95 printf("error");*/
96 for (i=0;i<N-2;i+=2)
97 {
98 X0 = (int)*xptr++;
99 asm volatile("MADD $ac1, %0, %1" : : "r" (X0), "r" (X0));
100
101 X1 = (int)*xptr++;
102 asm volatile("MADD $ac1, %0, %1" : : "r" (X1), "r" (X1));
103 }
104
105 for (;i<N;i++)
106 {
107 X0 = (int)*xptr++;
108 asm volatile("MADD $ac1, %0, %1" : : "r" (X0), "r" (X0));
109 }
110
111 asm volatile("MFLO %0, $ac1" : "=r" (E));
112 #ifdef FIXED_POINT
113 k = celt_ilog2(E)>>1;
114 #endif
115 t = VSHR32(E, 2*(k-7));
116 g = MULT16_16_P15(celt_rsqrt_norm(t),gain);
117
118 xptr = X;
119 for (i=0;i<N;i++)
120 {
121 *xptr = EXTRACT16(PSHR32(MULT16_16(g, *xptr), k+1));
122 xptr++;
123 }
124 /*return celt_sqrt(E);*/
125 }
126
127 #endif /* __VQ_MIPSR1_H__ */
OLDNEW
« no previous file with comments | « celt/mips/pitch_mipsr1.h ('k') | celt/modes.h » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698