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| 1 /* Copyright (c) 2014, Cisco Systems, INC |
| 2 Written by XiangMingZhu WeiZhou MinPeng YanWang |
| 3 |
| 4 Redistribution and use in source and binary forms, with or without |
| 5 modification, are permitted provided that the following conditions |
| 6 are met: |
| 7 |
| 8 - Redistributions of source code must retain the above copyright |
| 9 notice, this list of conditions and the following disclaimer. |
| 10 |
| 11 - Redistributions in binary form must reproduce the above copyright |
| 12 notice, this list of conditions and the following disclaimer in the |
| 13 documentation and/or other materials provided with the distribution. |
| 14 |
| 15 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 16 ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 17 LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
| 18 A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER |
| 19 OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, |
| 20 EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, |
| 21 PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR |
| 22 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF |
| 23 LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING |
| 24 NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 25 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 26 */ |
| 27 |
| 28 #ifdef HAVE_CONFIG_H |
| 29 #include "config.h" |
| 30 #endif |
| 31 |
| 32 #include <xmmintrin.h> |
| 33 #include <emmintrin.h> |
| 34 #include <smmintrin.h> |
| 35 #include "main.h" |
| 36 |
| 37 #include "SigProc_FIX.h" |
| 38 #include "pitch.h" |
| 39 |
| 40 opus_int64 silk_inner_prod16_aligned_64_sse4_1( |
| 41 const opus_int16 *inVec1, /* I input vector 1
*/ |
| 42 const opus_int16 *inVec2, /* I input vector 2
*/ |
| 43 const opus_int len /* I vector lengths
*/ |
| 44 ) |
| 45 { |
| 46 opus_int i, dataSize8; |
| 47 opus_int64 sum; |
| 48 |
| 49 __m128i xmm_tempa; |
| 50 __m128i inVec1_76543210, acc1; |
| 51 __m128i inVec2_76543210, acc2; |
| 52 |
| 53 sum = 0; |
| 54 dataSize8 = len & ~7; |
| 55 |
| 56 acc1 = _mm_setzero_si128(); |
| 57 acc2 = _mm_setzero_si128(); |
| 58 |
| 59 for( i = 0; i < dataSize8; i += 8 ) { |
| 60 inVec1_76543210 = _mm_loadu_si128( (__m128i *)(&inVec1[i + 0] ) ); |
| 61 inVec2_76543210 = _mm_loadu_si128( (__m128i *)(&inVec2[i + 0] ) ); |
| 62 |
| 63 /* only when all 4 operands are -32768 (0x8000), this results in wrap ar
ound */ |
| 64 inVec1_76543210 = _mm_madd_epi16( inVec1_76543210, inVec2_76543210 ); |
| 65 |
| 66 xmm_tempa = _mm_cvtepi32_epi64( inVec1_76543210 ); |
| 67 /* equal shift right 8 bytes */ |
| 68 inVec1_76543210 = _mm_shuffle_epi32( inVec1_76543210, _MM_SHUFFLE( 0, 0,
3, 2 ) ); |
| 69 inVec1_76543210 = _mm_cvtepi32_epi64( inVec1_76543210 ); |
| 70 |
| 71 acc1 = _mm_add_epi64( acc1, xmm_tempa ); |
| 72 acc2 = _mm_add_epi64( acc2, inVec1_76543210 ); |
| 73 } |
| 74 |
| 75 acc1 = _mm_add_epi64( acc1, acc2 ); |
| 76 |
| 77 /* equal shift right 8 bytes */ |
| 78 acc2 = _mm_shuffle_epi32( acc1, _MM_SHUFFLE( 0, 0, 3, 2 ) ); |
| 79 acc1 = _mm_add_epi64( acc1, acc2 ); |
| 80 |
| 81 _mm_storel_epi64( (__m128i *)&sum, acc1 ); |
| 82 |
| 83 for( ; i < len; i++ ) { |
| 84 sum = silk_SMLABB( sum, inVec1[ i ], inVec2[ i ] ); |
| 85 } |
| 86 |
| 87 return sum; |
| 88 } |
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