Out-of-line constant pool on Arm: Stage 3 - Set Constant Pool Pointer on Function Entry

src/arm/macro-assembler-arm.h

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 408 matching lines @@
       } else {
         Pop(src3, src4, cond);
         ldm(ia_w, sp, src1.bit() | src2.bit(), cond);
       }
     } else {
       Pop(src2, src3, src4, cond);
       ldr(src1, MemOperand(sp, 4, PostIndex), cond);
     }
   }
 
+  // Push a fixed frame, consisting of lr, fp, context, constant pool

[ulan, 2013/12/19 12:54:41]

swap "context" with "constant pool".

[rmcilroy, 2013/12/19 13:31:59]

Done.

+  // (if FLAG_enable_ool_constant_pool) and JS function / marker id if
+  // marker_reg is a valid register.
+  void PushFixedFrame(Register marker_reg = no_reg);
+  void PopFixedFrame(Register marker_reg = no_reg);
+
   // Push and pop the registers that can hold pointers, as defined by the
   // RegList constant kSafepointSavedRegisters.
   void PushSafepointRegisters();
   void PopSafepointRegisters();
   void PushSafepointRegistersAndDoubles();
   void PopSafepointRegistersAndDoubles();
   // Store value in register src in the safepoint stack slot for
   // register dst.
   void StoreToSafepointRegisterSlot(Register src, Register dst);
   void StoreToSafepointRegistersAndDoublesSlot(Register src, Register dst);
@@ skipping 88 matching lines @@
                          Register dst,
                          Register heap_number_map,
                          Register scratch,
                          DwVfpRegister double_scratch0,
                          LowDwVfpRegister double_scratch1,
                          Label* not_int32);
 
   // Generates function and stub prologue code.
   void Prologue(PrologueFrameMode frame_mode);
 
+  // Loads the constant pool pointer (pp) register.
+  void LoadConstantPoolPointerRegister();
+
   // Enter exit frame.
   // stack_space - extra stack space, used for alignment before call to C.
   void EnterExitFrame(bool save_doubles, int stack_space = 0);
 
   // Leave the current exit frame. Expects the return value in r0.
   // Expect the number of values, pushed prior to the exit frame, to
   // remove in a register (or no_reg, if there is nothing to remove).
   void LeaveExitFrame(bool save_doubles,
                       Register argument_count,
                       bool restore_context);
@@ skipping 840 matching lines @@
   template<typename Field>
   void DecodeField(Register reg) {
     static const int shift = Field::kShift;
     static const int mask = (Field::kMask >> shift) << kSmiTagSize;
     mov(reg, Operand(reg, LSR, shift));
     and_(reg, reg, Operand(mask));
   }
 
   // Activation support.
   void EnterFrame(StackFrame::Type type);
-  void LeaveFrame(StackFrame::Type type);
+  // Returns the pc offset at which the frame ends.
+  int LeaveFrame(StackFrame::Type type);
 
   // Expects object in r0 and returns map with validated enum cache
   // in r0.  Assumes that any other register can be used as a scratch.
   void CheckEnumCache(Register null_value, Label* call_runtime);
 
   // AllocationMemento support. Arrays may have an associated
   // AllocationMemento object that can be checked for in order to pretransition
   // to another type.
   // On entry, receiver_reg should point to the array object.
   // scratch_reg gets clobbered.
@@ skipping 131 matching lines @@
 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__)
 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm->
 #else
 #define ACCESS_MASM(masm) masm->
 #endif
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_ARM_MACRO_ASSEMBLER_ARM_H_