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Issue 870653002: Subzero: Initial implementation of multithreaded translation. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Rebase Created 5 years, 10 months ago
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1 ; Test that some errors trigger when the usage of NaCl atomic 1 ; Test that some errors trigger when the usage of NaCl atomic
2 ; intrinsics does not match the required ABI. 2 ; intrinsics does not match the required ABI.
3 3
4 ; RUN: not %p2i -i %s --args --verbose none 2>&1 | FileCheck %s 4 ; RUN: %p2i -i %s --args --verbose none --exit-success 2>&1 | FileCheck %s
5 5
6 declare i8 @llvm.nacl.atomic.load.i8(i8*, i32) 6 declare i8 @llvm.nacl.atomic.load.i8(i8*, i32)
7 declare i16 @llvm.nacl.atomic.load.i16(i16*, i32) 7 declare i16 @llvm.nacl.atomic.load.i16(i16*, i32)
8 declare i64 @llvm.nacl.atomic.load.i64(i64*, i32) 8 declare i64 @llvm.nacl.atomic.load.i64(i64*, i32)
9 declare void @llvm.nacl.atomic.store.i32(i32, i32*, i32) 9 declare void @llvm.nacl.atomic.store.i32(i32, i32*, i32)
10 declare void @llvm.nacl.atomic.store.i64(i64, i64*, i32) 10 declare void @llvm.nacl.atomic.store.i64(i64, i64*, i32)
11 declare i8 @llvm.nacl.atomic.rmw.i8(i32, i8*, i8, i32) 11 declare i8 @llvm.nacl.atomic.rmw.i8(i32, i8*, i8, i32)
12 declare i16 @llvm.nacl.atomic.rmw.i16(i32, i16*, i16, i32) 12 declare i16 @llvm.nacl.atomic.rmw.i16(i32, i16*, i16, i32)
13 declare i32 @llvm.nacl.atomic.rmw.i32(i32, i32*, i32, i32) 13 declare i32 @llvm.nacl.atomic.rmw.i32(i32, i32*, i32, i32)
14 declare i64 @llvm.nacl.atomic.rmw.i64(i32, i64*, i64, i32) 14 declare i64 @llvm.nacl.atomic.rmw.i64(i32, i64*, i64, i32)
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160 ; CHECK: Unexpected memory ordering for AtomicFence 160 ; CHECK: Unexpected memory ordering for AtomicFence
161 161
162 define i32 @error_atomic_is_lock_free_var(i32 %iptr, i32 %bs) { 162 define i32 @error_atomic_is_lock_free_var(i32 %iptr, i32 %bs) {
163 entry: 163 entry:
164 %ptr = inttoptr i32 %iptr to i8* 164 %ptr = inttoptr i32 %iptr to i8*
165 %i = call i1 @llvm.nacl.atomic.is.lock.free(i32 %bs, i8* %ptr) 165 %i = call i1 @llvm.nacl.atomic.is.lock.free(i32 %bs, i8* %ptr)
166 %r = zext i1 %i to i32 166 %r = zext i1 %i to i32
167 ret i32 %r 167 ret i32 %r
168 } 168 }
169 ; CHECK: AtomicIsLockFree byte size should be compile-time const 169 ; CHECK: AtomicIsLockFree byte size should be compile-time const
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