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| 1 //===- subzero/src/IceDefs.h - Common Subzero declaraions -------*- C++ -*-===// | 1 //===- subzero/src/IceDefs.h - Common Subzero declaraions -------*- C++ -*-===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 // | 9 // |
| 10 // This file declares various useful types and classes that have | 10 // This file declares various useful types and classes that have |
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| 122 | 122 |
| 123 typedef uint32_t TimerStackIdT; | 123 typedef uint32_t TimerStackIdT; |
| 124 typedef uint32_t TimerIdT; | 124 typedef uint32_t TimerIdT; |
| 125 | 125 |
| 126 // Use alignas(MaxCacheLineSize) to isolate variables/fields that | 126 // Use alignas(MaxCacheLineSize) to isolate variables/fields that |
| 127 // might be contended while multithreading. Assumes the maximum cache | 127 // might be contended while multithreading. Assumes the maximum cache |
| 128 // line size is 64. | 128 // line size is 64. |
| 129 enum { MaxCacheLineSize = 64 }; | 129 enum { MaxCacheLineSize = 64 }; |
| 130 // Use ICE_CACHELINE_BOUNDARY to force the next field in a declaration | 130 // Use ICE_CACHELINE_BOUNDARY to force the next field in a declaration |
| 131 // list to be aligned to the next cache line. | 131 // list to be aligned to the next cache line. |
| 132 // Note: zero is added to work around the following GCC 4.8 bug (fixed in 4.9): |
| 133 // https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55382 |
| 132 #define ICE_CACHELINE_BOUNDARY \ | 134 #define ICE_CACHELINE_BOUNDARY \ |
| 133 __attribute__((aligned(MaxCacheLineSize))) int : 0 | 135 __attribute__((aligned(MaxCacheLineSize + 0))) int : 0 |
| 134 | 136 |
| 135 // PNaCl is ILP32, so theoretically we should only need 32-bit offsets. | 137 // PNaCl is ILP32, so theoretically we should only need 32-bit offsets. |
| 136 typedef int32_t RelocOffsetT; | 138 typedef int32_t RelocOffsetT; |
| 137 enum { RelocAddrSize = 4 }; | 139 enum { RelocAddrSize = 4 }; |
| 138 | 140 |
| 139 enum LivenessMode { | 141 enum LivenessMode { |
| 140 // Basic version of live-range-end calculation. Marks the last uses | 142 // Basic version of live-range-end calculation. Marks the last uses |
| 141 // of variables based on dataflow analysis. Records the set of | 143 // of variables based on dataflow analysis. Records the set of |
| 142 // live-in and live-out variables for each block. Identifies and | 144 // live-in and live-out variables for each block. Identifies and |
| 143 // deletes dead instructions (primarily stores). | 145 // deletes dead instructions (primarily stores). |
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| 208 return llvm::make_range(Container.rbegin(), Container.rend()); | 210 return llvm::make_range(Container.rbegin(), Container.rend()); |
| 209 } | 211 } |
| 210 template <typename T> | 212 template <typename T> |
| 211 llvm::iterator_range<typename T::reverse_iterator> reverse_range(T &Container) { | 213 llvm::iterator_range<typename T::reverse_iterator> reverse_range(T &Container) { |
| 212 return llvm::make_range(Container.rbegin(), Container.rend()); | 214 return llvm::make_range(Container.rbegin(), Container.rend()); |
| 213 } | 215 } |
| 214 | 216 |
| 215 } // end of namespace Ice | 217 } // end of namespace Ice |
| 216 | 218 |
| 217 #endif // SUBZERO_SRC_ICEDEFS_H | 219 #endif // SUBZERO_SRC_ICEDEFS_H |
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