Implement bitLength intrinsic on x64.

runtime/vm/assembler_x64_test.cc

Index: runtime/vm/assembler_x64_test.cc
===================================================================
--- runtime/vm/assembler_x64_test.cc	(revision 43118)
+++ runtime/vm/assembler_x64_test.cc	(working copy)
@@ -620,9 +620,9 @@
 
 
 ASSEMBLER_TEST_GENERATE(Negate, assembler) {
-  __ movl(RCX, Immediate(42));
-  __ negl(RCX);
-  __ movl(RAX, RCX);
+  __ movq(RCX, Immediate(42));

[Cutch, 2015/01/23 22:10:00]

Good catch.

+  __ negq(RCX);
+  __ movq(RAX, RCX);
   __ ret();
 }
 
@@ -633,6 +633,29 @@
 }
 
 
+ASSEMBLER_TEST_GENERATE(BitScanReverse, assembler) {
+  __ pushq(CallingConventions::kArg1Reg);
+  __ movq(RCX, Address(RSP, 0));
+  __ movq(RAX, Immediate(666));  // Marker for conditional write.
+  __ bsrq(RAX, RCX);
+  __ popq(RCX);
+  __ ret();
+}
+
+
+ASSEMBLER_TEST_RUN(BitScanReverse, test) {
+  typedef int (*Bsr)(int input);
+  Bsr call = reinterpret_cast<Bsr>(test->entry());
+  EXPECT_EQ(666, call(0));
+  EXPECT_EQ(0, call(1));
+  EXPECT_EQ(1, call(2));
+  EXPECT_EQ(1, call(3));
+  EXPECT_EQ(2, call(4));
+  EXPECT_EQ(5, call(42));
+  EXPECT_EQ(31, call(-1));
+}
+
+
 ASSEMBLER_TEST_GENERATE(MoveExtend, assembler) {
   __ movq(RDX, Immediate(0xffff));
   __ movzxb(RAX, RDX);  // RAX = 0xff