Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(4)

Side by Side Diff: test/Transforms/NaCl/atomic/atomic_others.ll

Issue 857403002: Emit atomic memory order other than seq_cst on demand only (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-llvm.git@master
Patch Set: Created 5 years, 11 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « lib/Transforms/NaCl/RewriteAtomics.cpp ('k') | test/Transforms/NaCl/atomic/lock_.ll » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 ; RUN: opt -nacl-rewrite-atomics -S < %s | FileCheck %s 1 ; RUN: opt -nacl-rewrite-atomics -pnacl-memory-order-seq-cst-only=false -S < %s | FileCheck %s
2 ; 2 ;
3 ; Validate that atomic non-{acquire/release/acq_rel/seq_cst} loads/stores get 3 ; Validate that atomic non-{acquire/release/acq_rel/seq_cst} loads/stores get
4 ; rewritten into NaCl atomic builtins with sequentially consistent memory 4 ; rewritten into NaCl atomic builtins with sequentially consistent memory
5 ; ordering (enum value 6), and that acquire/release/acq_rel remain as-is (enum 5 ; ordering (enum value 6), and that acquire/release/acq_rel remain as-is (enum
6 ; values 3/4/5). 6 ; values 3/4/5).
7 ; 7 ;
8 ; Note that monotonic doesn't exist in C11/C++11, and consume isn't implemented 8 ; Note that monotonic doesn't exist in C11/C++11, and consume isn't implemented
9 ; in LLVM yet. 9 ; in LLVM yet.
10 10
11 target datalayout = "p:32:32:32" 11 target datalayout = "p:32:32:32"
(...skipping 21 matching lines...) Expand all
33 33
34 ; CHECK-LABEL: @test_atomic_store_unordered_i32 34 ; CHECK-LABEL: @test_atomic_store_unordered_i32
35 define void @test_atomic_store_unordered_i32(i32* %ptr, i32 %value) { 35 define void @test_atomic_store_unordered_i32(i32* %ptr, i32 %value) {
36 ; CHECK-NEXT: call void @llvm.nacl.atomic.store.i32(i32 %value, i32* %ptr, i32 6) 36 ; CHECK-NEXT: call void @llvm.nacl.atomic.store.i32(i32 %value, i32* %ptr, i32 6)
37 store atomic i32 %value, i32* %ptr unordered, align 4 37 store atomic i32 %value, i32* %ptr unordered, align 4
38 ret void ; CHECK-NEXT: ret void 38 ret void ; CHECK-NEXT: ret void
39 } 39 }
40 40
41 ; CHECK-LABEL: @test_atomic_load_acquire_i32 41 ; CHECK-LABEL: @test_atomic_load_acquire_i32
42 define i32 @test_atomic_load_acquire_i32(i32* %ptr) { 42 define i32 @test_atomic_load_acquire_i32(i32* %ptr) {
43 ; CHECK-NEXT: %res = call i32 @llvm.nacl.atomic.load.i32(i32* %ptr, i32 3) 43 ; CHECK-NEXT: %res = call i32 @llvm.nacl.atomic.load.i32(i32* %ptr, i32 3)
jvoung (off chromium) 2015/01/20 22:28:31 Could you add a test run w/ the flag being default
JF 2015/01/21 03:50:03 Done.
44 %res = load atomic i32* %ptr acquire, align 4 44 %res = load atomic i32* %ptr acquire, align 4
45 ret i32 %res ; CHECK-NEXT: ret i32 %res 45 ret i32 %res ; CHECK-NEXT: ret i32 %res
46 } 46 }
47 47
48 ; CHECK-LABEL: @test_atomic_store_release_i32 48 ; CHECK-LABEL: @test_atomic_store_release_i32
49 define void @test_atomic_store_release_i32(i32* %ptr, i32 %value) { 49 define void @test_atomic_store_release_i32(i32* %ptr, i32 %value) {
50 ; CHECK-NEXT: call void @llvm.nacl.atomic.store.i32(i32 %value, i32* %ptr, i32 4) 50 ; CHECK-NEXT: call void @llvm.nacl.atomic.store.i32(i32 %value, i32* %ptr, i32 4)
51 store atomic i32 %value, i32* %ptr release, align 4 51 store atomic i32 %value, i32* %ptr release, align 4
52 ret void ; CHECK-NEXT: ret void 52 ret void ; CHECK-NEXT: ret void
53 } 53 }
(...skipping 67 matching lines...) Expand 10 before | Expand all | Expand 10 after
121 ret { i32, i1 } %res 121 ret { i32, i1 } %res
122 } 122 }
123 123
124 ; CHECK-LABEL: @test_cmpxchg_relaxed_relaxed 124 ; CHECK-LABEL: @test_cmpxchg_relaxed_relaxed
125 define { i32, i1 } @test_cmpxchg_relaxed_relaxed(i32* %ptr, i32 %value) { 125 define { i32, i1 } @test_cmpxchg_relaxed_relaxed(i32* %ptr, i32 %value) {
126 ; Failure ordering is upgraded. 126 ; Failure ordering is upgraded.
127 ; CHECK-NEXT: %res = call i32 @llvm.nacl.atomic.cmpxchg.i32(i32* %ptr, i32 0, i32 %value, i32 6, i32 6) 127 ; CHECK-NEXT: %res = call i32 @llvm.nacl.atomic.cmpxchg.i32(i32* %ptr, i32 0, i32 %value, i32 6, i32 6)
128 %res = cmpxchg i32* %ptr, i32 0, i32 %value monotonic monotonic 128 %res = cmpxchg i32* %ptr, i32 0, i32 %value monotonic monotonic
129 ret { i32, i1 } %res 129 ret { i32, i1 } %res
130 } 130 }
OLDNEW
« no previous file with comments | « lib/Transforms/NaCl/RewriteAtomics.cpp ('k') | test/Transforms/NaCl/atomic/lock_.ll » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698