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Unified Diff: src/compiler/mips64/code-generator-mips64.cc

Issue 850733004: MIPS: [turbofan] Improve code generation for unordered comparisons. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 11 months ago
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« src/compiler/mips/code-generator-mips.cc ('K') | « src/compiler/mips/instruction-selector-mips.cc ('k') | src/compiler/mips64/instruction-selector-mips64.cc » ('j') | no next file with comments »
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Index: src/compiler/mips64/code-generator-mips64.cc
diff --git a/src/compiler/mips64/code-generator-mips64.cc b/src/compiler/mips64/code-generator-mips64.cc
index 9857b13078202dbf11c907a68af4b9c6337b1a10..1e4639fbe4e8f1130cefa2bf0ff8459fd0fe3476 100644
--- a/src/compiler/mips64/code-generator-mips64.cc
+++ b/src/compiler/mips64/code-generator-mips64.cc
@@ -204,6 +204,78 @@ class OutOfLineCeil FINAL : public OutOfLineRound {
};
+
+Condition FlagsConditionToConditionCmp(FlagsCondition condition) {
+ switch (condition) {
+ case kEqual:
+ return eq;
+ break;
+ case kNotEqual:
+ return ne;
+ break;
+ case kSignedLessThan:
+ return lt;
+ break;
+ case kSignedGreaterThanOrEqual:
+ return ge;
+ break;
+ case kSignedLessThanOrEqual:
+ return le;
+ break;
+ case kSignedGreaterThan:
+ return gt;
+ break;
+ case kUnsignedLessThan:
+ return lo;
+ break;
+ case kUnsignedGreaterThanOrEqual:
+ return hs;
+ break;
+ case kUnsignedLessThanOrEqual:
+ return ls;
+ break;
+ case kUnsignedGreaterThan:
+ return hi;
+ break;
+ default:
+ break;
+ }
+ UNREACHABLE();
+ return kNoCondition;
+}
+
+
+Condition FlagsConditionToConditionTst(FlagsCondition condition) {
+ switch (condition) {
+ case kNotEqual:
+ return ne;
+ break;
+ case kEqual:
+ return eq;
+ break;
+ default:
+ break;
+ }
+ UNREACHABLE();
+ return kNoCondition;
+}
+
+
+Condition FlagsConditionToConditionOvf(FlagsCondition condition) {
+ switch (condition) {
+ case kOverflow:
+ return ne;
+ break;
+ case kNotOverflow:
+ return eq;
+ break;
+ default:
+ break;
+ }
+ UNREACHABLE();
+ return kNoCondition;
+}
+
} // namespace
@@ -716,31 +788,11 @@ void CodeGenerator::AssembleArchBranch(Instruction* instr, BranchInfo* branch) {
// not separated by other instructions.
if (instr->arch_opcode() == kMips64Tst) {
- switch (branch->condition) {
- case kNotEqual:
- cc = ne;
- break;
- case kEqual:
- cc = eq;
- break;
- default:
- UNSUPPORTED_COND(kMips64Tst, branch->condition);
- break;
- }
+ cc = FlagsConditionToConditionTst(branch->condition);
__ And(at, i.InputRegister(0), i.InputOperand(1));
__ Branch(tlabel, cc, at, Operand(zero_reg));
} else if (instr->arch_opcode() == kMips64Tst32) {
- switch (branch->condition) {
- case kNotEqual:
- cc = ne;
- break;
- case kEqual:
- cc = eq;
- break;
- default:
- UNSUPPORTED_COND(kMips64Tst32, branch->condition);
- break;
- }
+ cc = FlagsConditionToConditionTst(branch->condition);
// Zero-extend registers on MIPS64 only 64-bit operand
// branch and compare op. is available.
// This is a disadvantage to perform 32-bit operation on MIPS64.
@@ -751,97 +803,19 @@ void CodeGenerator::AssembleArchBranch(Instruction* instr, BranchInfo* branch) {
__ Branch(tlabel, cc, at, Operand(zero_reg));
} else if (instr->arch_opcode() == kMips64Dadd ||
instr->arch_opcode() == kMips64Dsub) {
- switch (branch->condition) {
- case kOverflow:
- cc = ne;
- break;
- case kNotOverflow:
- cc = eq;
- break;
- default:
- UNSUPPORTED_COND(kMips64Dadd, branch->condition);
- break;
- }
+ cc = FlagsConditionToConditionOvf(branch->condition);
__ dsra32(kScratchReg, i.OutputRegister(), 0);
__ sra(at, i.OutputRegister(), 31);
__ Branch(tlabel, cc, at, Operand(kScratchReg));
} else if (instr->arch_opcode() == kMips64Cmp) {
- switch (branch->condition) {
- case kEqual:
- cc = eq;
- break;
- case kNotEqual:
- cc = ne;
- break;
- case kSignedLessThan:
- cc = lt;
- break;
- case kSignedGreaterThanOrEqual:
- cc = ge;
- break;
- case kSignedLessThanOrEqual:
- cc = le;
- break;
- case kSignedGreaterThan:
- cc = gt;
- break;
- case kUnsignedLessThan:
- cc = lo;
- break;
- case kUnsignedGreaterThanOrEqual:
- cc = hs;
- break;
- case kUnsignedLessThanOrEqual:
- cc = ls;
- break;
- case kUnsignedGreaterThan:
- cc = hi;
- break;
- default:
- UNSUPPORTED_COND(kMips64Cmp, branch->condition);
- break;
- }
+ cc = FlagsConditionToConditionCmp(branch->condition);
__ Branch(tlabel, cc, i.InputRegister(0), i.InputOperand(1));
if (!branch->fallthru) __ Branch(flabel); // no fallthru to flabel.
} else if (instr->arch_opcode() == kMips64Cmp32) {
- switch (branch->condition) {
- case kEqual:
- cc = eq;
- break;
- case kNotEqual:
- cc = ne;
- break;
- case kSignedLessThan:
- cc = lt;
- break;
- case kSignedGreaterThanOrEqual:
- cc = ge;
- break;
- case kSignedLessThanOrEqual:
- cc = le;
- break;
- case kSignedGreaterThan:
- cc = gt;
- break;
- case kUnsignedLessThan:
- cc = lo;
- break;
- case kUnsignedGreaterThanOrEqual:
- cc = hs;
- break;
- case kUnsignedLessThanOrEqual:
- cc = ls;
- break;
- case kUnsignedGreaterThan:
- cc = hi;
- break;
- default:
- UNSUPPORTED_COND(kMips64Cmp32, branch->condition);
- break;
- }
+ cc = FlagsConditionToConditionCmp(branch->condition);
switch (branch->condition) {
case kEqual:
@@ -880,24 +854,24 @@ void CodeGenerator::AssembleArchBranch(Instruction* instr, BranchInfo* branch) {
// even if we have to unfold BranchF macro.
Label* nan = flabel;
switch (branch->condition) {
- case kUnorderedEqual:
+ case kEqual:
cc = eq;
break;
- case kUnorderedNotEqual:
+ case kNotEqual:
cc = ne;
nan = tlabel;
break;
- case kUnorderedLessThan:
+ case kUnsignedLessThan:
cc = lt;
break;
- case kUnorderedGreaterThanOrEqual:
+ case kUnsignedGreaterThanOrEqual:
cc = ge;
nan = tlabel;
break;
- case kUnorderedLessThanOrEqual:
+ case kUnsignedLessThanOrEqual:
cc = le;
break;
- case kUnorderedGreaterThan:
+ case kUnsignedGreaterThan:
cc = gt;
nan = tlabel;
break;
@@ -944,32 +918,12 @@ void CodeGenerator::AssembleArchBoolean(Instruction* instr,
// false.
if (instr->arch_opcode() == kMips64Tst) {
- switch (condition) {
- case kNotEqual:
- cc = ne;
- break;
- case kEqual:
- cc = eq;
- break;
- default:
- UNSUPPORTED_COND(kMips64Tst, condition);
- break;
- }
+ cc = FlagsConditionToConditionTst(condition);
__ And(at, i.InputRegister(0), i.InputOperand(1));
__ Branch(USE_DELAY_SLOT, &done, cc, at, Operand(zero_reg));
__ li(result, Operand(1)); // In delay slot.
} else if (instr->arch_opcode() == kMips64Tst32) {
- switch (condition) {
- case kNotEqual:
- cc = ne;
- break;
- case kEqual:
- cc = eq;
- break;
- default:
- UNSUPPORTED_COND(kMips64Tst, condition);
- break;
- }
+ cc = FlagsConditionToConditionTst(condition);
// Zero-extend register on MIPS64 only 64-bit operand
// branch and compare op. is available.
__ And(at, i.InputRegister(0), i.InputOperand(1));
@@ -978,17 +932,7 @@ void CodeGenerator::AssembleArchBoolean(Instruction* instr,
__ li(result, Operand(1)); // In delay slot.
} else if (instr->arch_opcode() == kMips64Dadd ||
instr->arch_opcode() == kMips64Dsub) {
- switch (condition) {
- case kOverflow:
- cc = ne;
- break;
- case kNotOverflow:
- cc = eq;
- break;
- default:
- UNSUPPORTED_COND(kMips64DAdd, condition);
- break;
- }
+ cc = FlagsConditionToConditionOvf(condition);
__ dsra32(kScratchReg, i.OutputRegister(), 0);
__ sra(at, i.OutputRegister(), 31);
__ Branch(USE_DELAY_SLOT, &done, cc, at, Operand(kScratchReg));
@@ -996,81 +940,13 @@ void CodeGenerator::AssembleArchBoolean(Instruction* instr,
} else if (instr->arch_opcode() == kMips64Cmp) {
Register left = i.InputRegister(0);
Operand right = i.InputOperand(1);
- switch (condition) {
- case kEqual:
- cc = eq;
- break;
- case kNotEqual:
- cc = ne;
- break;
- case kSignedLessThan:
- cc = lt;
- break;
- case kSignedGreaterThanOrEqual:
- cc = ge;
- break;
- case kSignedLessThanOrEqual:
- cc = le;
- break;
- case kSignedGreaterThan:
- cc = gt;
- break;
- case kUnsignedLessThan:
- cc = lo;
- break;
- case kUnsignedGreaterThanOrEqual:
- cc = hs;
- break;
- case kUnsignedLessThanOrEqual:
- cc = ls;
- break;
- case kUnsignedGreaterThan:
- cc = hi;
- break;
- default:
- UNSUPPORTED_COND(kMips64Cmp, condition);
- break;
- }
+ cc = FlagsConditionToConditionCmp(condition);
__ Branch(USE_DELAY_SLOT, &done, cc, left, right);
__ li(result, Operand(1)); // In delay slot.
} else if (instr->arch_opcode() == kMips64Cmp32) {
Register left = i.InputRegister(0);
Operand right = i.InputOperand(1);
- switch (condition) {
- case kEqual:
- cc = eq;
- break;
- case kNotEqual:
- cc = ne;
- break;
- case kSignedLessThan:
- cc = lt;
- break;
- case kSignedGreaterThanOrEqual:
- cc = ge;
- break;
- case kSignedLessThanOrEqual:
- cc = le;
- break;
- case kSignedGreaterThan:
- cc = gt;
- break;
- case kUnsignedLessThan:
- cc = lo;
- break;
- case kUnsignedGreaterThanOrEqual:
- cc = hs;
- break;
- case kUnsignedLessThanOrEqual:
- cc = ls;
- break;
- case kUnsignedGreaterThan:
- cc = hi;
- break;
- default:
- UNSUPPORTED_COND(kMips64Cmp, condition);
- break;
- }
+ cc = FlagsConditionToConditionCmp(condition);
switch (condition) {
case kEqual:
@@ -1111,30 +987,30 @@ void CodeGenerator::AssembleArchBoolean(Instruction* instr,
FPURegister dummy1 = f0;
FPURegister dummy2 = f2;
switch (condition) {
- case kUnorderedEqual:
+ case kEqual:
// TODO(plind): improve the NaN testing throughout this function.
__ BranchF(NULL, &false_value, kNoCondition, dummy1, dummy2);
cc = eq;
break;
- case kUnorderedNotEqual:
+ case kNotEqual:
__ BranchF(USE_DELAY_SLOT, NULL, &done, kNoCondition, dummy1, dummy2);
__ li(result, Operand(1)); // In delay slot - returns 1 on NaN.
cc = ne;
break;
- case kUnorderedLessThan:
+ case kUnsignedLessThan:
__ BranchF(NULL, &false_value, kNoCondition, dummy1, dummy2);
cc = lt;
break;
- case kUnorderedGreaterThanOrEqual:
+ case kUnsignedGreaterThanOrEqual:
__ BranchF(USE_DELAY_SLOT, NULL, &done, kNoCondition, dummy1, dummy2);
__ li(result, Operand(1)); // In delay slot - returns 1 on NaN.
cc = ge;
break;
- case kUnorderedLessThanOrEqual:
+ case kUnsignedLessThanOrEqual:
__ BranchF(NULL, &false_value, kNoCondition, dummy1, dummy2);
cc = le;
break;
- case kUnorderedGreaterThan:
+ case kUnsignedGreaterThan:
__ BranchF(USE_DELAY_SLOT, NULL, &done, kNoCondition, dummy1, dummy2);
__ li(result, Operand(1)); // In delay slot - returns 1 on NaN.
cc = gt;
« src/compiler/mips/code-generator-mips.cc ('K') | « src/compiler/mips/instruction-selector-mips.cc ('k') | src/compiler/mips64/instruction-selector-mips64.cc » ('j') | no next file with comments »

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