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| 1 ============================ | 1 ============================ |
| 2 PNaCl C/C++ Language Support | 2 PNaCl C/C++ Language Support |
| 3 ============================ | 3 ============================ |
| 4 | 4 |
| 5 .. contents:: | 5 .. contents:: |
| 6 :local: | 6 :local: |
| 7 :backlinks: none | 7 :backlinks: none |
| 8 :depth: 3 | 8 :depth: 3 |
| 9 | 9 |
| 10 Source language support | 10 Source language support |
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| 43 .. _memory_model_and_atomics: | 43 .. _memory_model_and_atomics: |
| 44 | 44 |
| 45 Memory Model and Atomics | 45 Memory Model and Atomics |
| 46 ======================== | 46 ======================== |
| 47 | 47 |
| 48 Memory Model for Concurrent Operations | 48 Memory Model for Concurrent Operations |
| 49 -------------------------------------- | 49 -------------------------------------- |
| 50 | 50 |
| 51 The memory model offered by PNaCl relies on the same coding guidelines | 51 The memory model offered by PNaCl relies on the same coding guidelines |
| 52 as the C11/C++11 one: concurrent accesses must always occur through | 52 as the C11/C++11 one: concurrent accesses must always occur through |
| 53 atomic primitives (offered by `atomic intrinsics | 53 atomic primitives (offered by :ref:`atomic intrinsics |
| 54 <PNaClLangRef.html#atomicintrinsics>`_), and these accesses must always | 54 <bitcode_atomicintrinsics>`), and these accesses must always |
| 55 occur with the same size for the same memory location. Visibility of | 55 occur with the same size for the same memory location. Visibility of |
| 56 stores is provided on a happens-before basis that relates memory | 56 stores is provided on a happens-before basis that relates memory |
| 57 locations to each other as the C11/C++11 standards do. | 57 locations to each other as the C11/C++11 standards do. |
| 58 | 58 |
| 59 Non-atomic memory accesses may be reordered, separated, elided or fused | 59 Non-atomic memory accesses may be reordered, separated, elided or fused |
| 60 according to C and C++'s memory model before the pexe is created as well | 60 according to C and C++'s memory model before the pexe is created as well |
| 61 as after its creation. Accessing atomic memory location through | 61 as after its creation. Accessing atomic memory location through |
| 62 non-atomic primitives is :ref:`Undefined Behavior <undefined_behavior>`. | 62 non-atomic primitives is :ref:`Undefined Behavior <undefined_behavior>`. |
| 63 | 63 |
| 64 As in C11/C++11 some atomic accesses may be implemented with locks on | 64 As in C11/C++11 some atomic accesses may be implemented with locks on |
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| 469 A similar feature is **thread suspension**: The ability to | 469 A similar feature is **thread suspension**: The ability to |
| 470 asynchronously suspend and resume a thread and inspect or modify its | 470 asynchronously suspend and resume a thread and inspect or modify its |
| 471 execution state (such as register state). | 471 execution state (such as register state). |
| 472 | 472 |
| 473 Neither PNaCl nor NaCl currently support asynchronous interruption | 473 Neither PNaCl nor NaCl currently support asynchronous interruption |
| 474 or suspension of threads. | 474 or suspension of threads. |
| 475 | 475 |
| 476 If PNaCl were to support either of these, the interaction of | 476 If PNaCl were to support either of these, the interaction of |
| 477 ``volatile`` and atomics with same-thread signal handling would need | 477 ``volatile`` and atomics with same-thread signal handling would need |
| 478 to be carefully detailed. | 478 to be carefully detailed. |
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