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Side by Side Diff: src/IceTargetLoweringX8632.cpp

Issue 848193003: Subzero: Add locking to prepare for multithreaded translation. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Rebase Created 5 years, 11 months ago
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1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===// 1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file implements the TargetLoweringX8632 class, which 10 // This file implements the TargetLoweringX8632 class, which
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891 this->HasComputedFrame = true; 891 this->HasComputedFrame = true;
892 892
893 // Assign stack offsets to variables that have been linked to spilled 893 // Assign stack offsets to variables that have been linked to spilled
894 // variables. 894 // variables.
895 for (Variable *Var : VariablesLinkedToSpillSlots) { 895 for (Variable *Var : VariablesLinkedToSpillSlots) {
896 Variable *Linked = (llvm::cast<SpillVariable>(Var))->getLinkedTo(); 896 Variable *Linked = (llvm::cast<SpillVariable>(Var))->getLinkedTo();
897 Var->setStackOffset(Linked->getStackOffset()); 897 Var->setStackOffset(Linked->getStackOffset());
898 } 898 }
899 899
900 if (ALLOW_DUMP && Func->getContext()->isVerbose(IceV_Frame)) { 900 if (ALLOW_DUMP && Func->getContext()->isVerbose(IceV_Frame)) {
901 OstreamLocker L(Func->getContext());
901 Ostream &Str = Func->getContext()->getStrDump(); 902 Ostream &Str = Func->getContext()->getStrDump();
902 903
903 Str << "Stack layout:\n"; 904 Str << "Stack layout:\n";
904 uint32_t EspAdjustmentPaddingSize = 905 uint32_t EspAdjustmentPaddingSize =
905 SpillAreaSizeBytes - LocalsSpillAreaSize - 906 SpillAreaSizeBytes - LocalsSpillAreaSize -
906 GlobalsAndSubsequentPaddingSize - SpillAreaPaddingBytes; 907 GlobalsAndSubsequentPaddingSize - SpillAreaPaddingBytes;
907 Str << " in-args = " << InArgsSizeBytes << " bytes\n" 908 Str << " in-args = " << InArgsSizeBytes << " bytes\n"
908 << " return address = " << X86_RET_IP_SIZE_BYTES << " bytes\n" 909 << " return address = " << X86_RET_IP_SIZE_BYTES << " bytes\n"
909 << " preserved registers = " << PreservedRegsSizeBytes << " bytes\n" 910 << " preserved registers = " << PreservedRegsSizeBytes << " bytes\n"
910 << " spill area padding = " << SpillAreaPaddingBytes << " bytes\n" 911 << " spill area padding = " << SpillAreaPaddingBytes << " bytes\n"
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1021 } 1022 }
1022 1023
1023 void TargetX8632::emitConstants() const { 1024 void TargetX8632::emitConstants() const {
1024 // No need to emit constants from the int pool since (for x86) they 1025 // No need to emit constants from the int pool since (for x86) they
1025 // are embedded as immediates in the instructions, just emit float/double. 1026 // are embedded as immediates in the instructions, just emit float/double.
1026 if (Ctx->getFlags().UseELFWriter) { 1027 if (Ctx->getFlags().UseELFWriter) {
1027 ELFObjectWriter *Writer = Ctx->getObjectWriter(); 1028 ELFObjectWriter *Writer = Ctx->getObjectWriter();
1028 Writer->writeConstantPool<ConstantFloat>(IceType_f32); 1029 Writer->writeConstantPool<ConstantFloat>(IceType_f32);
1029 Writer->writeConstantPool<ConstantDouble>(IceType_f64); 1030 Writer->writeConstantPool<ConstantDouble>(IceType_f64);
1030 } else { 1031 } else {
1032 OstreamLocker L(Ctx);
1031 emitConstantPool<PoolTypeConverter<float>>(); 1033 emitConstantPool<PoolTypeConverter<float>>();
1032 emitConstantPool<PoolTypeConverter<double>>(); 1034 emitConstantPool<PoolTypeConverter<double>>();
1033 } 1035 }
1034 } 1036 }
1035 1037
1036 void TargetX8632::split64(Variable *Var) { 1038 void TargetX8632::split64(Variable *Var) {
1037 switch (Var->getType()) { 1039 switch (Var->getType()) {
1038 default: 1040 default:
1039 return; 1041 return;
1040 case IceType_i64: 1042 case IceType_i64:
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3560 return false; 3562 return false;
3561 } 3563 }
3562 3564
3563 void dumpAddressOpt(const Cfg *Func, const Variable *Base, 3565 void dumpAddressOpt(const Cfg *Func, const Variable *Base,
3564 const Variable *Index, uint16_t Shift, int32_t Offset, 3566 const Variable *Index, uint16_t Shift, int32_t Offset,
3565 const Inst *Reason) { 3567 const Inst *Reason) {
3566 if (!ALLOW_DUMP) 3568 if (!ALLOW_DUMP)
3567 return; 3569 return;
3568 if (!Func->getContext()->isVerbose(IceV_AddrOpt)) 3570 if (!Func->getContext()->isVerbose(IceV_AddrOpt))
3569 return; 3571 return;
3572 OstreamLocker L(Func->getContext());
3570 Ostream &Str = Func->getContext()->getStrDump(); 3573 Ostream &Str = Func->getContext()->getStrDump();
3571 Str << "Instruction: "; 3574 Str << "Instruction: ";
3572 Reason->dumpDecorated(Func); 3575 Reason->dumpDecorated(Func);
3573 Str << " results in Base="; 3576 Str << " results in Base=";
3574 if (Base) 3577 if (Base)
3575 Base->dump(Func); 3578 Base->dump(Func);
3576 else 3579 else
3577 Str << "<null>"; 3580 Str << "<null>";
3578 Str << ", Index="; 3581 Str << ", Index=";
3579 if (Index) 3582 if (Index)
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3731 Reason = BaseInst; 3734 Reason = BaseInst;
3732 return true; 3735 return true;
3733 } 3736 }
3734 return false; 3737 return false;
3735 } 3738 }
3736 3739
3737 void computeAddressOpt(Cfg *Func, const Inst *Instr, Variable *&Base, 3740 void computeAddressOpt(Cfg *Func, const Inst *Instr, Variable *&Base,
3738 Variable *&Index, uint16_t &Shift, int32_t &Offset) { 3741 Variable *&Index, uint16_t &Shift, int32_t &Offset) {
3739 Func->resetCurrentNode(); 3742 Func->resetCurrentNode();
3740 if (Func->getContext()->isVerbose(IceV_AddrOpt)) { 3743 if (Func->getContext()->isVerbose(IceV_AddrOpt)) {
3744 OstreamLocker L(Func->getContext());
3741 Ostream &Str = Func->getContext()->getStrDump(); 3745 Ostream &Str = Func->getContext()->getStrDump();
3742 Str << "\nStarting computeAddressOpt for instruction:\n "; 3746 Str << "\nStarting computeAddressOpt for instruction:\n ";
3743 Instr->dumpDecorated(Func); 3747 Instr->dumpDecorated(Func);
3744 } 3748 }
3745 (void)Offset; // TODO: pattern-match for non-zero offsets. 3749 (void)Offset; // TODO: pattern-match for non-zero offsets.
3746 if (Base == nullptr) 3750 if (Base == nullptr)
3747 return; 3751 return;
3748 // If the Base has more than one use or is live across multiple 3752 // If the Base has more than one use or is live across multiple
3749 // blocks, then don't go further. Alternatively (?), never consider 3753 // blocks, then don't go further. Alternatively (?), never consider
3750 // a transformation that would change a variable that is currently 3754 // a transformation that would change a variable that is currently
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4572 std::random_shuffle(Shuffled.begin(), Shuffled.end(), RNG); 4576 std::random_shuffle(Shuffled.begin(), Shuffled.end(), RNG);
4573 for (size_t SI = 0, SE = Shuffled.size(); SI < SE; ++SI) { 4577 for (size_t SI = 0, SE = Shuffled.size(); SI < SE; ++SI) {
4574 Permutation[List[SI]] = Shuffled[SI]; 4578 Permutation[List[SI]] = Shuffled[SI];
4575 ++NumShuffled; 4579 ++NumShuffled;
4576 } 4580 }
4577 } 4581 }
4578 4582
4579 assert(NumShuffled + NumPreserved == RegX8632::Reg_NUM); 4583 assert(NumShuffled + NumPreserved == RegX8632::Reg_NUM);
4580 4584
4581 if (Func->getContext()->isVerbose(IceV_Random)) { 4585 if (Func->getContext()->isVerbose(IceV_Random)) {
4586 OstreamLocker L(Func->getContext());
4582 Ostream &Str = Func->getContext()->getStrDump(); 4587 Ostream &Str = Func->getContext()->getStrDump();
4583 Str << "Register equivalence classes:\n"; 4588 Str << "Register equivalence classes:\n";
4584 for (auto I : EquivalenceClasses) { 4589 for (auto I : EquivalenceClasses) {
4585 Str << "{"; 4590 Str << "{";
4586 const RegisterList &List = I.second; 4591 const RegisterList &List = I.second;
4587 bool First = true; 4592 bool First = true;
4588 for (int32_t Register : List) { 4593 for (int32_t Register : List) {
4589 if (!First) 4594 if (!First)
4590 Str << " "; 4595 Str << " ";
4591 First = false; 4596 First = false;
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4718 } else if (IsConstant || IsExternal) 4723 } else if (IsConstant || IsExternal)
4719 Str << "\t.zero\t" << Size << "\n"; 4724 Str << "\t.zero\t" << Size << "\n";
4720 // Size is part of .comm. 4725 // Size is part of .comm.
4721 4726
4722 if (IsConstant || HasNonzeroInitializer || IsExternal) 4727 if (IsConstant || HasNonzeroInitializer || IsExternal)
4723 Str << "\t.size\t" << MangledName << ", " << Size << "\n"; 4728 Str << "\t.size\t" << MangledName << ", " << Size << "\n";
4724 // Size is part of .comm. 4729 // Size is part of .comm.
4725 } 4730 }
4726 4731
4727 } // end of namespace Ice 4732 } // end of namespace Ice
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