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| 1 // Copyright 2007-2008 the V8 project authors. All rights reserved. | 1 // Copyright 2007-2008 the V8 project authors. All rights reserved. |
| 2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
| 3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
| 4 // met: | 4 // met: |
| 5 // | 5 // |
| 6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
| 7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
| 8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
| 9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
| 10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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| 82 {0x90, "nop", UNSET_OP_ORDER}, | 82 {0x90, "nop", UNSET_OP_ORDER}, |
| 83 {0xF4, "hlt", UNSET_OP_ORDER}, | 83 {0xF4, "hlt", UNSET_OP_ORDER}, |
| 84 {0xCC, "int3", UNSET_OP_ORDER}, | 84 {0xCC, "int3", UNSET_OP_ORDER}, |
| 85 {0x60, "pushad", UNSET_OP_ORDER}, | 85 {0x60, "pushad", UNSET_OP_ORDER}, |
| 86 {0x61, "popad", UNSET_OP_ORDER}, | 86 {0x61, "popad", UNSET_OP_ORDER}, |
| 87 {0x9C, "pushfd", UNSET_OP_ORDER}, | 87 {0x9C, "pushfd", UNSET_OP_ORDER}, |
| 88 {0x9D, "popfd", UNSET_OP_ORDER}, | 88 {0x9D, "popfd", UNSET_OP_ORDER}, |
| 89 {0x9E, "sahf", UNSET_OP_ORDER}, | 89 {0x9E, "sahf", UNSET_OP_ORDER}, |
| 90 {0x99, "cdq", UNSET_OP_ORDER}, | 90 {0x99, "cdq", UNSET_OP_ORDER}, |
| 91 {0x9B, "fwait", UNSET_OP_ORDER}, | 91 {0x9B, "fwait", UNSET_OP_ORDER}, |
| 92 {0xFC, "cld", UNSET_OP_ORDER}, |
| 92 {-1, "", UNSET_OP_ORDER} | 93 {-1, "", UNSET_OP_ORDER} |
| 93 }; | 94 }; |
| 94 | 95 |
| 95 | 96 |
| 96 static ByteMnemonic call_jump_instr[] = { | 97 static ByteMnemonic call_jump_instr[] = { |
| 97 {0xE8, "call", UNSET_OP_ORDER}, | 98 {0xE8, "call", UNSET_OP_ORDER}, |
| 98 {0xE9, "jmp", UNSET_OP_ORDER}, | 99 {0xE9, "jmp", UNSET_OP_ORDER}, |
| 99 {-1, "", UNSET_OP_ORDER} | 100 {-1, "", UNSET_OP_ORDER} |
| 100 }; | 101 }; |
| 101 | 102 |
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| 1048 data += PrintOperands("mov_w", REG_OPER_OP_ORDER, data); | 1049 data += PrintOperands("mov_w", REG_OPER_OP_ORDER, data); |
| 1049 } else if (*data == 0x89) { | 1050 } else if (*data == 0x89) { |
| 1050 data++; | 1051 data++; |
| 1051 int mod, regop, rm; | 1052 int mod, regop, rm; |
| 1052 get_modrm(*data, &mod, ®op, &rm); | 1053 get_modrm(*data, &mod, ®op, &rm); |
| 1053 AppendToBuffer("mov_w "); | 1054 AppendToBuffer("mov_w "); |
| 1054 data += PrintRightOperand(data); | 1055 data += PrintRightOperand(data); |
| 1055 AppendToBuffer(",%s", NameOfCPURegister(regop)); | 1056 AppendToBuffer(",%s", NameOfCPURegister(regop)); |
| 1056 } else if (*data == 0x0F) { | 1057 } else if (*data == 0x0F) { |
| 1057 data++; | 1058 data++; |
| 1058 if (*data == 0x2F) { | 1059 if (*data == 0x38) { |
| 1060 data++; |
| 1061 if (*data == 0x17) { |
| 1062 data++; |
| 1063 int mod, regop, rm; |
| 1064 get_modrm(*data, &mod, ®op, &rm); |
| 1065 AppendToBuffer("ptest %s,%s", |
| 1066 NameOfXMMRegister(regop), |
| 1067 NameOfXMMRegister(rm)); |
| 1068 data++; |
| 1069 } else { |
| 1070 UnimplementedInstruction(); |
| 1071 } |
| 1072 } else if (*data == 0x2F) { |
| 1059 data++; | 1073 data++; |
| 1060 int mod, regop, rm; | 1074 int mod, regop, rm; |
| 1061 get_modrm(*data, &mod, ®op, &rm); | 1075 get_modrm(*data, &mod, ®op, &rm); |
| 1062 AppendToBuffer("comisd %s,%s", | 1076 AppendToBuffer("comisd %s,%s", |
| 1063 NameOfXMMRegister(regop), | 1077 NameOfXMMRegister(regop), |
| 1064 NameOfXMMRegister(rm)); | 1078 NameOfXMMRegister(rm)); |
| 1065 data++; | 1079 data++; |
| 1066 } else if (*data == 0x57) { | 1080 } else if (*data == 0x57) { |
| 1067 data++; | 1081 data++; |
| 1068 int mod, regop, rm; | 1082 int mod, regop, rm; |
| 1069 get_modrm(*data, &mod, ®op, &rm); | 1083 get_modrm(*data, &mod, ®op, &rm); |
| 1070 AppendToBuffer("xorpd %s,%s", | 1084 AppendToBuffer("xorpd %s,%s", |
| 1071 NameOfXMMRegister(regop), | 1085 NameOfXMMRegister(regop), |
| 1072 NameOfXMMRegister(rm)); | 1086 NameOfXMMRegister(rm)); |
| 1073 data++; | 1087 data++; |
| 1088 } else if (*data == 0x6E) { |
| 1089 data++; |
| 1090 int mod, regop, rm; |
| 1091 get_modrm(*data, &mod, ®op, &rm); |
| 1092 AppendToBuffer("movd %s,", NameOfXMMRegister(regop)); |
| 1093 data += PrintRightOperand(data); |
| 1074 } else if (*data == 0x6F) { | 1094 } else if (*data == 0x6F) { |
| 1075 data++; | 1095 data++; |
| 1076 int mod, regop, rm; | 1096 int mod, regop, rm; |
| 1077 get_modrm(*data, &mod, ®op, &rm); | 1097 get_modrm(*data, &mod, ®op, &rm); |
| 1078 AppendToBuffer("movdqa %s,", NameOfXMMRegister(regop)); | 1098 AppendToBuffer("movdqa %s,", NameOfXMMRegister(regop)); |
| 1079 data += PrintRightOperand(data); | 1099 data += PrintRightOperand(data); |
| 1080 } else if (*data == 0x7F) { | 1100 } else if (*data == 0x7F) { |
| 1081 AppendToBuffer("movdqa "); | 1101 AppendToBuffer("movdqa "); |
| 1082 data++; | 1102 data++; |
| 1083 int mod, regop, rm; | 1103 int mod, regop, rm; |
| 1084 get_modrm(*data, &mod, ®op, &rm); | 1104 get_modrm(*data, &mod, ®op, &rm); |
| 1085 data += PrintRightOperand(data); | 1105 data += PrintRightOperand(data); |
| 1086 AppendToBuffer(",%s", NameOfXMMRegister(regop)); | 1106 AppendToBuffer(",%s", NameOfXMMRegister(regop)); |
| 1107 } else if (*data == 0xEF) { |
| 1108 data++; |
| 1109 int mod, regop, rm; |
| 1110 get_modrm(*data, &mod, ®op, &rm); |
| 1111 AppendToBuffer("pxor %s,%s", |
| 1112 NameOfXMMRegister(regop), |
| 1113 NameOfXMMRegister(rm)); |
| 1114 data++; |
| 1087 } else { | 1115 } else { |
| 1088 UnimplementedInstruction(); | 1116 UnimplementedInstruction(); |
| 1089 } | 1117 } |
| 1090 } else { | 1118 } else { |
| 1091 UnimplementedInstruction(); | 1119 UnimplementedInstruction(); |
| 1092 } | 1120 } |
| 1093 break; | 1121 break; |
| 1094 | 1122 |
| 1095 case 0xFE: | 1123 case 0xFE: |
| 1096 { data++; | 1124 { data++; |
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| 1163 } else if (b2 == 0x10) { | 1191 } else if (b2 == 0x10) { |
| 1164 data += 3; | 1192 data += 3; |
| 1165 int mod, regop, rm; | 1193 int mod, regop, rm; |
| 1166 get_modrm(*data, &mod, ®op, &rm); | 1194 get_modrm(*data, &mod, ®op, &rm); |
| 1167 AppendToBuffer("movsd %s,", NameOfXMMRegister(regop)); | 1195 AppendToBuffer("movsd %s,", NameOfXMMRegister(regop)); |
| 1168 data += PrintRightOperand(data); | 1196 data += PrintRightOperand(data); |
| 1169 } else { | 1197 } else { |
| 1170 const char* mnem = "?"; | 1198 const char* mnem = "?"; |
| 1171 switch (b2) { | 1199 switch (b2) { |
| 1172 case 0x2A: mnem = "cvtsi2sd"; break; | 1200 case 0x2A: mnem = "cvtsi2sd"; break; |
| 1201 case 0x51: mnem = "sqrtsd"; break; |
| 1173 case 0x58: mnem = "addsd"; break; | 1202 case 0x58: mnem = "addsd"; break; |
| 1174 case 0x59: mnem = "mulsd"; break; | 1203 case 0x59: mnem = "mulsd"; break; |
| 1175 case 0x5C: mnem = "subsd"; break; | 1204 case 0x5C: mnem = "subsd"; break; |
| 1176 case 0x5E: mnem = "divsd"; break; | 1205 case 0x5E: mnem = "divsd"; break; |
| 1177 } | 1206 } |
| 1178 data += 3; | 1207 data += 3; |
| 1179 int mod, regop, rm; | 1208 int mod, regop, rm; |
| 1180 get_modrm(*data, &mod, ®op, &rm); | 1209 get_modrm(*data, &mod, ®op, &rm); |
| 1181 if (b2 == 0x2A) { | 1210 if (b2 == 0x2A) { |
| 1182 AppendToBuffer("%s %s,", mnem, NameOfXMMRegister(regop)); | 1211 AppendToBuffer("%s %s,", mnem, NameOfXMMRegister(regop)); |
| 1183 data += PrintRightOperand(data); | 1212 data += PrintRightOperand(data); |
| 1184 } else { | 1213 } else { |
| 1185 AppendToBuffer("%s %s,%s", | 1214 AppendToBuffer("%s %s,%s", |
| 1186 mnem, | 1215 mnem, |
| 1187 NameOfXMMRegister(regop), | 1216 NameOfXMMRegister(regop), |
| 1188 NameOfXMMRegister(rm)); | 1217 NameOfXMMRegister(rm)); |
| 1189 data++; | 1218 data++; |
| 1190 } | 1219 } |
| 1191 } | 1220 } |
| 1192 } else { | 1221 } else { |
| 1193 UnimplementedInstruction(); | 1222 UnimplementedInstruction(); |
| 1194 } | 1223 } |
| 1195 break; | 1224 break; |
| 1196 | 1225 |
| 1197 case 0xF3: | 1226 case 0xF3: |
| 1198 if (*(data+1) == 0x0F) { | 1227 if (*(data+1) == 0x0F) { |
| 1199 if (*(data+2) == 0x2C) { | 1228 if (*(data+2) == 0x2C) { |
| 1200 data += 3; | 1229 data += 3; |
| 1201 data += PrintOperands("cvttss2si", REG_OPER_OP_ORDER, data); | 1230 data += PrintOperands("cvttss2si", REG_OPER_OP_ORDER, data); |
| 1231 } else if (*(data+2) == 0x5A) { |
| 1232 data += 3; |
| 1233 int mod, regop, rm; |
| 1234 get_modrm(*data, &mod, ®op, &rm); |
| 1235 AppendToBuffer("cvtss2sd %s,%s", |
| 1236 NameOfXMMRegister(regop), |
| 1237 NameOfXMMRegister(rm)); |
| 1238 data++; |
| 1202 } else if (*(data+2) == 0x6F) { | 1239 } else if (*(data+2) == 0x6F) { |
| 1203 data += 3; | 1240 data += 3; |
| 1204 int mod, regop, rm; | 1241 int mod, regop, rm; |
| 1205 get_modrm(*data, &mod, ®op, &rm); | 1242 get_modrm(*data, &mod, ®op, &rm); |
| 1206 AppendToBuffer("movdqu %s,", NameOfXMMRegister(regop)); | 1243 AppendToBuffer("movdqu %s,", NameOfXMMRegister(regop)); |
| 1207 data += PrintRightOperand(data); | 1244 data += PrintRightOperand(data); |
| 1208 } else if (*(data+2) == 0x7F) { | 1245 } else if (*(data+2) == 0x7F) { |
| 1209 AppendToBuffer("movdqu "); | 1246 AppendToBuffer("movdqu "); |
| 1210 data += 3; | 1247 data += 3; |
| 1211 int mod, regop, rm; | 1248 int mod, regop, rm; |
| 1212 get_modrm(*data, &mod, ®op, &rm); | 1249 get_modrm(*data, &mod, ®op, &rm); |
| 1213 data += PrintRightOperand(data); | 1250 data += PrintRightOperand(data); |
| 1214 AppendToBuffer(",%s", NameOfXMMRegister(regop)); | 1251 AppendToBuffer(",%s", NameOfXMMRegister(regop)); |
| 1215 } else { | 1252 } else { |
| 1216 UnimplementedInstruction(); | 1253 UnimplementedInstruction(); |
| 1217 } | 1254 } |
| 1218 } else if (*(data+1) == 0xA5) { | 1255 } else if (*(data+1) == 0xA5) { |
| 1219 data += 2; | 1256 data += 2; |
| 1220 AppendToBuffer("rep_movs"); | 1257 AppendToBuffer("rep_movs"); |
| 1258 } else if (*(data+1) == 0xAB) { |
| 1259 data += 2; |
| 1260 AppendToBuffer("rep_stos"); |
| 1221 } else { | 1261 } else { |
| 1222 UnimplementedInstruction(); | 1262 UnimplementedInstruction(); |
| 1223 } | 1263 } |
| 1224 break; | 1264 break; |
| 1225 | 1265 |
| 1226 case 0xF7: | 1266 case 0xF7: |
| 1227 data += F7Instruction(data); | 1267 data += F7Instruction(data); |
| 1228 break; | 1268 break; |
| 1229 | 1269 |
| 1230 default: | 1270 default: |
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| 1352 } | 1392 } |
| 1353 for (int i = 6 - (pc - prev_pc); i >= 0; i--) { | 1393 for (int i = 6 - (pc - prev_pc); i >= 0; i--) { |
| 1354 fprintf(f, " "); | 1394 fprintf(f, " "); |
| 1355 } | 1395 } |
| 1356 fprintf(f, " %s\n", buffer.start()); | 1396 fprintf(f, " %s\n", buffer.start()); |
| 1357 } | 1397 } |
| 1358 } | 1398 } |
| 1359 | 1399 |
| 1360 | 1400 |
| 1361 } // namespace disasm | 1401 } // namespace disasm |
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