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1 // Copyright 2010 the V8 project authors. All rights reserved. | 1 // Copyright 2010 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 // This file is an internal atomic implementation, use atomicops.h instead. | 5 // This file is an internal atomic implementation, use atomicops.h instead. |
6 | 6 |
7 #ifndef V8_BASE_ATOMICOPS_INTERNALS_MIPS_GCC_H_ | 7 #ifndef V8_BASE_ATOMICOPS_INTERNALS_MIPS_GCC_H_ |
8 #define V8_BASE_ATOMICOPS_INTERNALS_MIPS_GCC_H_ | 8 #define V8_BASE_ATOMICOPS_INTERNALS_MIPS_GCC_H_ |
9 | 9 |
10 namespace v8 { | 10 namespace v8 { |
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29 "1:\n" | 29 "1:\n" |
30 "ll %0, 0(%4)\n" // prev = *ptr | 30 "ll %0, 0(%4)\n" // prev = *ptr |
31 "bne %0, %2, 2f\n" // if (prev != old_value) goto 2 | 31 "bne %0, %2, 2f\n" // if (prev != old_value) goto 2 |
32 "move %1, %3\n" // tmp = new_value | 32 "move %1, %3\n" // tmp = new_value |
33 "sc %1, 0(%4)\n" // *ptr = tmp (with atomic check) | 33 "sc %1, 0(%4)\n" // *ptr = tmp (with atomic check) |
34 "beqz %1, 1b\n" // start again on atomic error | 34 "beqz %1, 1b\n" // start again on atomic error |
35 "nop\n" // delay slot nop | 35 "nop\n" // delay slot nop |
36 "2:\n" | 36 "2:\n" |
37 ".set pop\n" | 37 ".set pop\n" |
38 : "=&r" (prev), "=&r" (tmp) | 38 : "=&r" (prev), "=&r" (tmp) |
39 : "Ir" (old_value), "r" (new_value), "r" (ptr) | 39 : "r" (old_value), "r" (new_value), "r" (ptr) |
40 : "memory"); | 40 : "memory"); |
41 return prev; | 41 return prev; |
42 } | 42 } |
43 | 43 |
44 // Atomically store new_value into *ptr, returning the previous value held in | 44 // Atomically store new_value into *ptr, returning the previous value held in |
45 // *ptr. This routine implies no memory barriers. | 45 // *ptr. This routine implies no memory barriers. |
46 inline Atomic32 NoBarrier_AtomicExchange(volatile Atomic32* ptr, | 46 inline Atomic32 NoBarrier_AtomicExchange(volatile Atomic32* ptr, |
47 Atomic32 new_value) { | 47 Atomic32 new_value) { |
48 Atomic32 temp, old; | 48 Atomic32 temp, old; |
49 __asm__ __volatile__(".set push\n" | 49 __asm__ __volatile__(".set push\n" |
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151 } | 151 } |
152 | 152 |
153 inline Atomic32 Release_Load(volatile const Atomic32* ptr) { | 153 inline Atomic32 Release_Load(volatile const Atomic32* ptr) { |
154 MemoryBarrier(); | 154 MemoryBarrier(); |
155 return *ptr; | 155 return *ptr; |
156 } | 156 } |
157 | 157 |
158 } } // namespace v8::base | 158 } } // namespace v8::base |
159 | 159 |
160 #endif // V8_BASE_ATOMICOPS_INTERNALS_MIPS_GCC_H_ | 160 #endif // V8_BASE_ATOMICOPS_INTERNALS_MIPS_GCC_H_ |
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