Make fixups reference any constant (allow const float/double pool literals).

src/IceInstX8632.cpp

 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the InstX8632 and OperandX8632 classes,
@@ skipping 569 matching lines @@
       (Asm->*(Emitter.GPRAddr))(Ty, VarReg, SrcStackAddr);
     }
   } else if (const auto Mem = llvm::dyn_cast<OperandX8632Mem>(Src)) {
     Mem->emitSegmentOverride(Asm);
     (Asm->*(Emitter.GPRAddr))(Ty, VarReg, Mem->toAsmAddress(Asm));
   } else if (const auto Imm = llvm::dyn_cast<ConstantInteger32>(Src)) {
     (Asm->*(Emitter.GPRImm))(Ty, VarReg, x86::Immediate(Imm->getValue()));
   } else if (const auto Reloc = llvm::dyn_cast<ConstantRelocatable>(Src)) {
     AssemblerFixup *Fixup =
         x86::DisplacementRelocation::create(Asm, FK_Abs_4, Reloc);
-    (Asm->*(Emitter.GPRImm))(Ty, VarReg, x86::Immediate(Fixup));
+    (Asm->*(Emitter.GPRImm))(Ty, VarReg,
+                             x86::Immediate(Reloc->getOffset(), Fixup));
   } else if (const auto Split = llvm::dyn_cast<VariableSplit>(Src)) {
     (Asm->*(Emitter.GPRAddr))(Ty, VarReg, Split->toAsmAddress(Func));
   } else {
     llvm_unreachable("Unexpected operand type");
   }
 }
 
 void emitIASAddrOpTyGPR(const Cfg *Func, Type Ty, const x86::Address &Addr,
                         const Operand *Src,
                         const x86::AssemblerX86::GPREmitterAddrOp &Emitter) {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   // Src can only be Reg or Immediate.
   if (const auto SrcVar = llvm::dyn_cast<Variable>(Src)) {
     assert(SrcVar->hasReg());
     RegX8632::GPRRegister SrcReg =
         RegX8632::getEncodedByteRegOrGPR(Ty, SrcVar->getRegNum());
     (Asm->*(Emitter.AddrGPR))(Ty, Addr, SrcReg);
   } else if (const auto Imm = llvm::dyn_cast<ConstantInteger32>(Src)) {
     (Asm->*(Emitter.AddrImm))(Ty, Addr, x86::Immediate(Imm->getValue()));
   } else if (const auto Reloc = llvm::dyn_cast<ConstantRelocatable>(Src)) {
     AssemblerFixup *Fixup =
         x86::DisplacementRelocation::create(Asm, FK_Abs_4, Reloc);
-    (Asm->*(Emitter.AddrImm))(Ty, Addr, x86::Immediate(Fixup));
+    (Asm->*(Emitter.AddrImm))(Ty, Addr,
+                              x86::Immediate(Reloc->getOffset(), Fixup));
   } else {
     llvm_unreachable("Unexpected operand type");
   }
 }
 
 void emitIASAsAddrOpTyGPR(const Cfg *Func, Type Ty, const Operand *Op0,
                           const Operand *Op1,
                           const x86::AssemblerX86::GPREmitterAddrOp &Emitter) {
   if (const auto Op0Var = llvm::dyn_cast<Variable>(Op0)) {
     assert(!Op0Var->hasReg());
@@ skipping 96 matching lines @@
       (Asm->*(Emitter.XmmXmm))(Ty, VarReg, SrcReg);
     } else {
       x86::Address SrcStackAddr = static_cast<TargetX8632 *>(Func->getTarget())
                                       ->stackVarToAsmOperand(SrcVar);
       (Asm->*(Emitter.XmmAddr))(Ty, VarReg, SrcStackAddr);
     }
   } else if (const auto Mem = llvm::dyn_cast<OperandX8632Mem>(Src)) {
     assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
     (Asm->*(Emitter.XmmAddr))(Ty, VarReg, Mem->toAsmAddress(Asm));
   } else if (const auto Imm = llvm::dyn_cast<Constant>(Src)) {
-    (Asm->*(Emitter.XmmAddr))(
-        Ty, VarReg, x86::Address::ofConstPool(Func->getContext(), Asm, Imm));
+    (Asm->*(Emitter.XmmAddr))(Ty, VarReg, x86::Address::ofConstPool(Asm, Imm));
   } else {
     llvm_unreachable("Unexpected operand type");
   }
 }
 
 template <typename DReg_t, typename SReg_t, DReg_t (*destEnc)(int32_t),
           SReg_t (*srcEnc)(int32_t)>
 void emitIASCastRegOp(
     const Cfg *Func, Type DispatchTy, const Variable *Dest, const Operand *Src,
     const x86::AssemblerX86::CastEmitterRegOp<DReg_t, SReg_t> Emitter) {
@@ skipping 1570 matching lines @@
       Asm->add(IceType_i32, RegX8632::Encoded_Reg_esp, Width);
     } else {
       x86::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
                                  ->stackVarToAsmOperand(Var));
       Asm->fld(Ty, StackAddr);
     }
   } else if (const auto Mem = llvm::dyn_cast<OperandX8632Mem>(Src)) {
     assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
     Asm->fld(Ty, Mem->toAsmAddress(Asm));
   } else if (const auto Imm = llvm::dyn_cast<Constant>(Src)) {
-    Asm->fld(Ty, x86::Address::ofConstPool(Func->getContext(), Asm, Imm));
+    Asm->fld(Ty, x86::Address::ofConstPool(Asm, Imm));
   } else {
     llvm_unreachable("Unexpected operand type");
   }
 }
 
 void InstX8632Fld::dump(const Cfg *Func) const {
   if (!ALLOW_DUMP)
     return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "fld." << getSrc(0)->getType() << " ";
@@ skipping 509 matching lines @@
 
 x86::Address OperandX8632Mem::toAsmAddress(Assembler *Asm) const {
   int32_t Disp = 0;
   AssemblerFixup *Fixup = nullptr;
   // Determine the offset (is it relocatable?)
   if (getOffset()) {
     if (const auto CI = llvm::dyn_cast<ConstantInteger32>(getOffset())) {
       Disp = static_cast<int32_t>(CI->getValue());
     } else if (const auto CR =
                    llvm::dyn_cast<ConstantRelocatable>(getOffset())) {
+      Disp = CR->getOffset();
       Fixup = x86::DisplacementRelocation::create(Asm, FK_Abs_4, CR);
     } else {
       llvm_unreachable("Unexpected offset type");
     }
   }
 
   // Now convert to the various possible forms.
   if (getBase() && getIndex()) {
     return x86::Address(RegX8632::getEncodedGPR(getBase()->getRegNum()),
                         RegX8632::getEncodedGPR(getIndex()->getRegNum()),
                         x86::ScaleFactor(getShift()), Disp);
   } else if (getBase()) {
     return x86::Address(RegX8632::getEncodedGPR(getBase()->getRegNum()), Disp);
   } else if (getIndex()) {
     return x86::Address(RegX8632::getEncodedGPR(getIndex()->getRegNum()),
                         x86::ScaleFactor(getShift()), Disp);
   } else if (Fixup) {
-    // The fixup itself has an offset, so Disp should still be 0.
-    assert(Disp == 0);
-    return x86::Address::Absolute(Fixup);
+    return x86::Address::Absolute(Disp, Fixup);
   } else {
     return x86::Address::Absolute(Disp);
   }
 }
 
 x86::Address VariableSplit::toAsmAddress(const Cfg *Func) const {
   assert(!Var->hasReg());
   const TargetLowering *Target = Func->getTarget();
   int32_t Offset =
       Var->getStackOffset() + Target->getStackAdjustment() + getOffset();
@@ skipping 32 matching lines @@
   }
   Str << "(";
   if (Func)
     Var->dump(Func);
   else
     Var->dump(Str);
   Str << ")";
 }
 
 } // end of namespace Ice