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1 | 1 |
2 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 2 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
3 // All Rights Reserved. | 3 // All Rights Reserved. |
4 // | 4 // |
5 // Redistribution and use in source and binary forms, with or without | 5 // Redistribution and use in source and binary forms, with or without |
6 // modification, are permitted provided that the following conditions are | 6 // modification, are permitted provided that the following conditions are |
7 // met: | 7 // met: |
8 // | 8 // |
9 // - Redistributions of source code must retain the above copyright notice, | 9 // - Redistributions of source code must retain the above copyright notice, |
10 // this list of conditions and the following disclaimer. | 10 // this list of conditions and the following disclaimer. |
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253 | 253 |
254 Handle<Object> RelocInfo::code_age_stub_handle(Assembler* origin) { | 254 Handle<Object> RelocInfo::code_age_stub_handle(Assembler* origin) { |
255 UNREACHABLE(); // This should never be reached on Arm. | 255 UNREACHABLE(); // This should never be reached on Arm. |
256 return Handle<Object>(); | 256 return Handle<Object>(); |
257 } | 257 } |
258 | 258 |
259 | 259 |
260 Code* RelocInfo::code_age_stub() { | 260 Code* RelocInfo::code_age_stub() { |
261 ASSERT(rmode_ == RelocInfo::CODE_AGE_SEQUENCE); | 261 ASSERT(rmode_ == RelocInfo::CODE_AGE_SEQUENCE); |
262 return Code::GetCodeFromTargetAddress( | 262 return Code::GetCodeFromTargetAddress( |
263 Memory::Address_at(pc_ + Assembler::kInstrSize * | 263 Assembler::target_address_at(pc_ + Assembler::kInstrSize)); |
264 (kNoCodeAgeSequenceLength - 1))); | |
265 } | 264 } |
266 | 265 |
267 | 266 |
268 void RelocInfo::set_code_age_stub(Code* stub) { | 267 void RelocInfo::set_code_age_stub(Code* stub) { |
269 ASSERT(rmode_ == RelocInfo::CODE_AGE_SEQUENCE); | 268 ASSERT(rmode_ == RelocInfo::CODE_AGE_SEQUENCE); |
270 Memory::Address_at(pc_ + Assembler::kInstrSize * | 269 Assembler::set_target_address_at(pc_ + Assembler::kInstrSize, |
271 (kNoCodeAgeSequenceLength - 1)) = | 270 stub->instruction_start()); |
272 stub->instruction_start(); | |
273 } | 271 } |
274 | 272 |
275 | 273 |
276 Address RelocInfo::call_address() { | 274 Address RelocInfo::call_address() { |
277 ASSERT((IsJSReturn(rmode()) && IsPatchedReturnSequence()) || | 275 ASSERT((IsJSReturn(rmode()) && IsPatchedReturnSequence()) || |
278 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence())); | 276 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence())); |
279 // The pc_ offset of 0 assumes mips patched return sequence per | 277 // The pc_ offset of 0 assumes mips patched return sequence per |
280 // debug-mips.cc BreakLocationIterator::SetDebugBreakAtReturn(), or | 278 // debug-mips.cc BreakLocationIterator::SetDebugBreakAtReturn(), or |
281 // debug break slot per BreakLocationIterator::SetDebugBreakAtSlot(). | 279 // debug break slot per BreakLocationIterator::SetDebugBreakAtSlot(). |
282 return Assembler::target_address_at(pc_); | 280 return Assembler::target_address_at(pc_); |
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420 } | 418 } |
421 *reinterpret_cast<Instr*>(pc_) = x; | 419 *reinterpret_cast<Instr*>(pc_) = x; |
422 pc_ += kInstrSize; | 420 pc_ += kInstrSize; |
423 CheckTrampolinePoolQuick(); | 421 CheckTrampolinePoolQuick(); |
424 } | 422 } |
425 | 423 |
426 | 424 |
427 } } // namespace v8::internal | 425 } } // namespace v8::internal |
428 | 426 |
429 #endif // V8_MIPS_ASSEMBLER_MIPS_INL_H_ | 427 #endif // V8_MIPS_ASSEMBLER_MIPS_INL_H_ |
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