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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include <limits.h> | 5 #include <limits.h> |
6 #include <stdarg.h> | 6 #include <stdarg.h> |
7 #include <stdlib.h> | 7 #include <stdlib.h> |
8 #include <cmath> | 8 #include <cmath> |
9 | 9 |
10 #include "src/v8.h" | 10 #include "src/v8.h" |
11 | 11 |
12 #if V8_TARGET_ARCH_MIPS64 | 12 #if V8_TARGET_ARCH_MIPS64 |
13 | 13 |
14 #include "src/assembler.h" | 14 #include "src/assembler.h" |
15 #include "src/base/bits.h" | 15 #include "src/base/bits.h" |
| 16 #include "src/codegen.h" |
16 #include "src/disasm.h" | 17 #include "src/disasm.h" |
17 #include "src/mips64/constants-mips64.h" | 18 #include "src/mips64/constants-mips64.h" |
18 #include "src/mips64/simulator-mips64.h" | 19 #include "src/mips64/simulator-mips64.h" |
19 #include "src/ostreams.h" | 20 #include "src/ostreams.h" |
20 | 21 |
21 // Only build the simulator if not compiling for real MIPS hardware. | 22 // Only build the simulator if not compiling for real MIPS hardware. |
22 #if defined(USE_SIMULATOR) | 23 #if defined(USE_SIMULATOR) |
23 | 24 |
24 namespace v8 { | 25 namespace v8 { |
25 namespace internal { | 26 namespace internal { |
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2384 case ABS_D: | 2385 case ABS_D: |
2385 set_fpu_register_double(fd_reg, fabs(fs)); | 2386 set_fpu_register_double(fd_reg, fabs(fs)); |
2386 break; | 2387 break; |
2387 case MOV_D: | 2388 case MOV_D: |
2388 set_fpu_register_double(fd_reg, fs); | 2389 set_fpu_register_double(fd_reg, fs); |
2389 break; | 2390 break; |
2390 case NEG_D: | 2391 case NEG_D: |
2391 set_fpu_register_double(fd_reg, -fs); | 2392 set_fpu_register_double(fd_reg, -fs); |
2392 break; | 2393 break; |
2393 case SQRT_D: | 2394 case SQRT_D: |
2394 set_fpu_register_double(fd_reg, sqrt(fs)); | 2395 set_fpu_register_double(fd_reg, fast_sqrt(fs)); |
2395 break; | 2396 break; |
2396 case C_UN_D: | 2397 case C_UN_D: |
2397 set_fcsr_bit(fcsr_cc, std::isnan(fs) || std::isnan(ft)); | 2398 set_fcsr_bit(fcsr_cc, std::isnan(fs) || std::isnan(ft)); |
2398 break; | 2399 break; |
2399 case C_EQ_D: | 2400 case C_EQ_D: |
2400 set_fcsr_bit(fcsr_cc, (fs == ft)); | 2401 set_fcsr_bit(fcsr_cc, (fs == ft)); |
2401 break; | 2402 break; |
2402 case C_UEQ_D: | 2403 case C_UEQ_D: |
2403 set_fcsr_bit(fcsr_cc, | 2404 set_fcsr_bit(fcsr_cc, |
2404 (fs == ft) || (std::isnan(fs) || std::isnan(ft))); | 2405 (fs == ft) || (std::isnan(fs) || std::isnan(ft))); |
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3447 } | 3448 } |
3448 | 3449 |
3449 | 3450 |
3450 #undef UNSUPPORTED | 3451 #undef UNSUPPORTED |
3451 | 3452 |
3452 } } // namespace v8::internal | 3453 } } // namespace v8::internal |
3453 | 3454 |
3454 #endif // USE_SIMULATOR | 3455 #endif // USE_SIMULATOR |
3455 | 3456 |
3456 #endif // V8_TARGET_ARCH_MIPS64 | 3457 #endif // V8_TARGET_ARCH_MIPS64 |
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