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1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===// | 1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 // | 9 // |
10 // This file implements the TargetLoweringX8632 class, which | 10 // This file implements the TargetLoweringX8632 class, which |
11 // consists almost entirely of the lowering sequence for each | 11 // consists almost entirely of the lowering sequence for each |
12 // high-level instruction. | 12 // high-level instruction. |
13 // | 13 // |
14 //===----------------------------------------------------------------------===// | 14 //===----------------------------------------------------------------------===// |
15 | 15 |
16 #include "llvm/ADT/DenseMap.h" | |
17 #include "llvm/Support/CommandLine.h" | 16 #include "llvm/Support/CommandLine.h" |
18 #include "llvm/Support/MathExtras.h" | 17 #include "llvm/Support/MathExtras.h" |
19 | 18 |
20 #include "IceCfg.h" | 19 #include "IceCfg.h" |
21 #include "IceCfgNode.h" | 20 #include "IceCfgNode.h" |
22 #include "IceClFlags.h" | 21 #include "IceClFlags.h" |
23 #include "IceDefs.h" | 22 #include "IceDefs.h" |
24 #include "IceGlobalInits.h" | 23 #include "IceGlobalInits.h" |
25 #include "IceInstX8632.h" | 24 #include "IceInstX8632.h" |
26 #include "IceLiveness.h" | 25 #include "IceLiveness.h" |
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920 << " spill area alignment = " << SpillAreaAlignmentBytes << " bytes\n" | 919 << " spill area alignment = " << SpillAreaAlignmentBytes << " bytes\n" |
921 << " locals spill area alignment = " << LocalsSlotsAlignmentBytes | 920 << " locals spill area alignment = " << LocalsSlotsAlignmentBytes |
922 << " bytes\n" | 921 << " bytes\n" |
923 << " is ebp based = " << IsEbpBasedFrame << "\n"; | 922 << " is ebp based = " << IsEbpBasedFrame << "\n"; |
924 } | 923 } |
925 } | 924 } |
926 | 925 |
927 void TargetX8632::addEpilog(CfgNode *Node) { | 926 void TargetX8632::addEpilog(CfgNode *Node) { |
928 InstList &Insts = Node->getInsts(); | 927 InstList &Insts = Node->getInsts(); |
929 InstList::reverse_iterator RI, E; | 928 InstList::reverse_iterator RI, E; |
930 // TODO(stichnot): Use llvm::make_range with LLVM 3.5. | |
931 for (RI = Insts.rbegin(), E = Insts.rend(); RI != E; ++RI) { | 929 for (RI = Insts.rbegin(), E = Insts.rend(); RI != E; ++RI) { |
932 if (llvm::isa<InstX8632Ret>(*RI)) | 930 if (llvm::isa<InstX8632Ret>(*RI)) |
933 break; | 931 break; |
934 } | 932 } |
935 if (RI == E) | 933 if (RI == E) |
936 return; | 934 return; |
937 | 935 |
938 // Convert the reverse_iterator position into its corresponding | 936 // Convert the reverse_iterator position into its corresponding |
939 // (forward) iterator position. | 937 // (forward) iterator position. |
940 InstList::iterator InsertPoint = RI.base(); | 938 InstList::iterator InsertPoint = RI.base(); |
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4235 Available[Var->getRegNum()] = false; | 4233 Available[Var->getRegNum()] = false; |
4236 } | 4234 } |
4237 } | 4235 } |
4238 // Iterate backwards through the Assignments. After lowering each | 4236 // Iterate backwards through the Assignments. After lowering each |
4239 // assignment, add Dest to the set of available registers, and | 4237 // assignment, add Dest to the set of available registers, and |
4240 // remove Src from the set of available registers. Iteration is | 4238 // remove Src from the set of available registers. Iteration is |
4241 // done backwards to enable incremental updates of the available | 4239 // done backwards to enable incremental updates of the available |
4242 // register set, and the lowered instruction numbers may be out of | 4240 // register set, and the lowered instruction numbers may be out of |
4243 // order, but that can be worked around by renumbering the block | 4241 // order, but that can be worked around by renumbering the block |
4244 // afterwards if necessary. | 4242 // afterwards if necessary. |
4245 for (auto I = Assignments.rbegin(), E = Assignments.rend(); I != E; ++I) { | 4243 for (const Inst &I : reverse_range(Assignments)) { |
4246 Context.rewind(); | 4244 Context.rewind(); |
4247 auto Assign = llvm::dyn_cast<InstAssign>(&*I); | 4245 auto Assign = llvm::dyn_cast<InstAssign>(&I); |
4248 Variable *Dest = Assign->getDest(); | 4246 Variable *Dest = Assign->getDest(); |
4249 Operand *Src = Assign->getSrc(0); | 4247 Operand *Src = Assign->getSrc(0); |
4250 Variable *SrcVar = llvm::dyn_cast<Variable>(Src); | 4248 Variable *SrcVar = llvm::dyn_cast<Variable>(Src); |
4251 // Use normal assignment lowering, except lower mem=mem specially | 4249 // Use normal assignment lowering, except lower mem=mem specially |
4252 // so we can register-allocate at the same time. | 4250 // so we can register-allocate at the same time. |
4253 if (!isMemoryOperand(Dest) || !isMemoryOperand(Src)) { | 4251 if (!isMemoryOperand(Dest) || !isMemoryOperand(Src)) { |
4254 lowerAssign(Assign); | 4252 lowerAssign(Assign); |
4255 } else { | 4253 } else { |
4256 assert(Dest->getType() == Src->getType()); | 4254 assert(Dest->getType() == Src->getType()); |
4257 const llvm::SmallBitVector &RegsForType = | 4255 const llvm::SmallBitVector &RegsForType = |
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4717 } else if (IsConstant || IsExternal) | 4715 } else if (IsConstant || IsExternal) |
4718 Str << "\t.zero\t" << Size << "\n"; | 4716 Str << "\t.zero\t" << Size << "\n"; |
4719 // Size is part of .comm. | 4717 // Size is part of .comm. |
4720 | 4718 |
4721 if (IsConstant || HasNonzeroInitializer || IsExternal) | 4719 if (IsConstant || HasNonzeroInitializer || IsExternal) |
4722 Str << "\t.size\t" << MangledName << ", " << Size << "\n"; | 4720 Str << "\t.size\t" << MangledName << ", " << Size << "\n"; |
4723 // Size is part of .comm. | 4721 // Size is part of .comm. |
4724 } | 4722 } |
4725 | 4723 |
4726 } // end of namespace Ice | 4724 } // end of namespace Ice |
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