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Side by Side Diff: src/IceCfg.cpp

Issue 830303003: Subzero: Clean up a few areas. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Rewrite another loop using reverse_range() Created 5 years, 11 months ago
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1 //===- subzero/src/IceCfg.cpp - Control flow graph implementation ---------===// 1 //===- subzero/src/IceCfg.cpp - Control flow graph implementation ---------===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file implements the Cfg class, including constant pool 10 // This file implements the Cfg class, including constant pool
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262 262
263 void Cfg::liveness(LivenessMode Mode) { 263 void Cfg::liveness(LivenessMode Mode) {
264 TimerMarker T(TimerStack::TT_liveness, this); 264 TimerMarker T(TimerStack::TT_liveness, this);
265 Live.reset(new Liveness(this, Mode)); 265 Live.reset(new Liveness(this, Mode));
266 getVMetadata()->init(VMK_Uses); 266 getVMetadata()->init(VMK_Uses);
267 Live->init(); 267 Live->init();
268 // Initialize with all nodes needing to be processed. 268 // Initialize with all nodes needing to be processed.
269 llvm::BitVector NeedToProcess(Nodes.size(), true); 269 llvm::BitVector NeedToProcess(Nodes.size(), true);
270 while (NeedToProcess.any()) { 270 while (NeedToProcess.any()) {
271 // Iterate in reverse topological order to speed up convergence. 271 // Iterate in reverse topological order to speed up convergence.
272 for (auto I = Nodes.rbegin(), E = Nodes.rend(); I != E; ++I) { 272 for (CfgNode *Node : reverse_range(Nodes)) {
273 CfgNode *Node = *I;
274 if (NeedToProcess[Node->getIndex()]) { 273 if (NeedToProcess[Node->getIndex()]) {
275 NeedToProcess[Node->getIndex()] = false; 274 NeedToProcess[Node->getIndex()] = false;
276 bool Changed = Node->liveness(getLiveness()); 275 bool Changed = Node->liveness(getLiveness());
277 if (Changed) { 276 if (Changed) {
278 // If the beginning-of-block liveness changed since the last 277 // If the beginning-of-block liveness changed since the last
279 // iteration, mark all in-edges as needing to be processed. 278 // iteration, mark all in-edges as needing to be processed.
280 for (CfgNode *Pred : Node->getInEdges()) 279 for (CfgNode *Pred : Node->getInEdges())
281 NeedToProcess[Pred->getIndex()] = true; 280 NeedToProcess[Pred->getIndex()] = true;
282 } 281 }
283 } 282 }
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435 if (!ALLOW_DUMP) 434 if (!ALLOW_DUMP)
436 return; 435 return;
437 TimerMarker T(TimerStack::TT_emit, this); 436 TimerMarker T(TimerStack::TT_emit, this);
438 if (Ctx->getFlags().DecorateAsm) { 437 if (Ctx->getFlags().DecorateAsm) {
439 renumberInstructions(); 438 renumberInstructions();
440 getVMetadata()->init(VMK_Uses); 439 getVMetadata()->init(VMK_Uses);
441 liveness(Liveness_Basic); 440 liveness(Liveness_Basic);
442 dump("After recomputing liveness for -decorate-asm"); 441 dump("After recomputing liveness for -decorate-asm");
443 } 442 }
444 Ostream &Str = Ctx->getStrEmit(); 443 Ostream &Str = Ctx->getStrEmit();
445 if (!Ctx->testAndSetHasEmittedFirstMethod()) {
446 // Print a helpful command for assembling the output.
447 // TODO: have the Target emit the header
448 // TODO: need a per-file emit in addition to per-CFG
449 Str << "# $LLVM_BIN_PATH/llvm-mc"
450 << " -arch=x86"
451 << " -filetype=obj"
452 << " -o=MyObj.o"
453 << "\n\n";
454 }
455 IceString MangledName = getContext()->mangleName(getFunctionName()); 444 IceString MangledName = getContext()->mangleName(getFunctionName());
456 emitTextHeader(MangledName); 445 emitTextHeader(MangledName);
457 for (CfgNode *Node : Nodes) 446 for (CfgNode *Node : Nodes)
458 Node->emit(this); 447 Node->emit(this);
459 Str << "\n"; 448 Str << "\n";
460 } 449 }
461 450
462 void Cfg::emitIAS() { 451 void Cfg::emitIAS() {
463 TimerMarker T(TimerStack::TT_emit, this); 452 TimerMarker T(TimerStack::TT_emit, this);
464 assert(!Ctx->getFlags().DecorateAsm); 453 assert(!Ctx->getFlags().DecorateAsm);
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518 } 507 }
519 } 508 }
520 // Print each basic block 509 // Print each basic block
521 for (CfgNode *Node : Nodes) 510 for (CfgNode *Node : Nodes)
522 Node->dump(this); 511 Node->dump(this);
523 if (getContext()->isVerbose(IceV_Instructions)) 512 if (getContext()->isVerbose(IceV_Instructions))
524 Str << "}\n"; 513 Str << "}\n";
525 } 514 }
526 515
527 } // end of namespace Ice 516 } // end of namespace Ice
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