Subzero: Clean up a few areas.

src/IceCfgNode.cpp

 //===- subzero/src/IceCfgNode.cpp - Basic block (node) implementation -----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the CfgNode class, including the complexities
@@ skipping 86 matching lines @@
 // all the assignments near the end of this block.  They need to be
 // added before any branch instruction, and also if the block ends
 // with a compare instruction followed by a branch instruction that we
 // may want to fuse, it's better to insert the new assignments before
 // the compare instruction. The tryOptimizedCmpxchgCmpBr() method
 // assumes this ordering of instructions.
 //
 // Note that this transformation takes the Phi dest variables out of
 // SSA form, as there may be assignments to the dest variable in
 // multiple blocks.
-//
-// TODO: Defer this pass until after register allocation, then split
-// critical edges, add the assignments, and lower them.  This should
-// reduce the amount of shuffling at the end of each block.
 void CfgNode::placePhiStores() {
   // Find the insertion point.
   InstList::iterator InsertionPoint = Insts.end();
   // Every block must end in a terminator instruction, and therefore
   // must have at least one instruction, so it's valid to decrement
   // InsertionPoint (but assert just in case).
   assert(InsertionPoint != Insts.begin());
   --InsertionPoint;
   // Confirm that InsertionPoint is a terminator instruction.  Calling
   // getTerminatorEdges() on a non-terminator instruction will cause
@@ skipping 124 matching lines @@
   for (auto I = InEdges.begin(), E = InEdges.end(); !Found && I != E; ++I) {
     if (*I == Pred) {
       *I = NewNode;
       NewNode->OutEdges.push_back(this);
       Found = true;
     }
   }
   assert(Found);
   // Repoint a suitable branch instruction's target.
   Found = false;
   for (auto I = Pred->getInsts().rbegin(), E = Pred->getInsts().rend();

[jvoung (off chromium), 2015/01/09 19:10:43]

can this be converted to reverse_range() too?

[Jim Stichnoth, 2015/01/09 19:41:23]

Done.  (I didn't do it initially because of style concerns, but now I think the
reverse_range() style wins out.)

        !Found && I != E; ++I) {
     if (!I->isDeleted()) {
       Found = I->repointEdge(this, NewNode);
     }
   }
   assert(Found);
   return NewNode;
 }
 
 namespace {
@@ skipping 260 matching lines @@
     assert(Context.getCur() != Orig);
   }
   // Do preliminary lowering of the Phi instructions.
   Target->prelowerPhis();
 }
 
 void CfgNode::livenessLightweight() {
   SizeT NumVars = Func->getNumVariables();
   LivenessBV Live(NumVars);
   // Process regular instructions in reverse order.
-  // TODO(stichnot): Use llvm::make_range with LLVM 3.5.
-  for (auto I = Insts.rbegin(), E = Insts.rend(); I != E; ++I) {
-    if (I->isDeleted())
+  for (Inst &I : reverse_range(Insts)) {
+    if (I.isDeleted())
       continue;
-    I->livenessLightweight(Func, Live);
+    I.livenessLightweight(Func, Live);
   }
   for (Inst &I : Phis) {
     if (I.isDeleted())
       continue;
     I.livenessLightweight(Func, Live);
   }
 }
 
 // Performs liveness analysis on the block.  Returns true if the
 // incoming liveness changed from before, false if it stayed the same.
@@ skipping 21 matching lines @@
     Live |= Liveness->getLiveIn(Succ);
     // Mark corresponding argument of phis in successor as live.
     for (Inst &I : Succ->Phis) {
       auto Phi = llvm::dyn_cast<InstPhi>(&I);
       Phi->livenessPhiOperand(Live, this, Liveness);
     }
   }
   Liveness->getLiveOut(this) = Live;
 
   // Process regular instructions in reverse order.
-  for (auto I = Insts.rbegin(), E = Insts.rend(); I != E; ++I) {
-    if (I->isDeleted())
+  for (Inst &I : reverse_range(Insts)) {
+    if (I.isDeleted())
       continue;
-    I->liveness(I->getNumber(), Live, Liveness, LiveBegin, LiveEnd);
+    I.liveness(I.getNumber(), Live, Liveness, LiveBegin, LiveEnd);
   }
   // Process phis in forward order so that we can override the
   // instruction number to be that of the earliest phi instruction in
   // the block.
   SizeT NumNonDeadPhis = 0;
   InstNumberT FirstPhiNumber = Inst::NumberSentinel;
   for (Inst &I : Phis) {
     if (I.isDeleted())
       continue;
     if (FirstPhiNumber == Inst::NumberSentinel)
@@ skipping 392 matching lines @@
       if (!First)
         Str << ", ";
       First = false;
       Str << "%" << I->getName();
     }
     Str << "\n";
   }
 }
 
 } // end of namespace Ice