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1 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===// | 1 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 // | 9 // |
10 // This file implements the InstX8632 and OperandX8632 classes, | 10 // This file implements the InstX8632 and OperandX8632 classes, |
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578 x86::Address SrcStackAddr = static_cast<TargetX8632 *>(Func->getTarget()) | 578 x86::Address SrcStackAddr = static_cast<TargetX8632 *>(Func->getTarget()) |
579 ->stackVarToAsmOperand(SrcVar); | 579 ->stackVarToAsmOperand(SrcVar); |
580 (Asm->*(Emitter.GPRAddr))(Ty, VarReg, SrcStackAddr); | 580 (Asm->*(Emitter.GPRAddr))(Ty, VarReg, SrcStackAddr); |
581 } | 581 } |
582 } else if (const auto Mem = llvm::dyn_cast<OperandX8632Mem>(Src)) { | 582 } else if (const auto Mem = llvm::dyn_cast<OperandX8632Mem>(Src)) { |
583 Mem->emitSegmentOverride(Asm); | 583 Mem->emitSegmentOverride(Asm); |
584 (Asm->*(Emitter.GPRAddr))(Ty, VarReg, Mem->toAsmAddress(Asm)); | 584 (Asm->*(Emitter.GPRAddr))(Ty, VarReg, Mem->toAsmAddress(Asm)); |
585 } else if (const auto Imm = llvm::dyn_cast<ConstantInteger32>(Src)) { | 585 } else if (const auto Imm = llvm::dyn_cast<ConstantInteger32>(Src)) { |
586 (Asm->*(Emitter.GPRImm))(Ty, VarReg, x86::Immediate(Imm->getValue())); | 586 (Asm->*(Emitter.GPRImm))(Ty, VarReg, x86::Immediate(Imm->getValue())); |
587 } else if (const auto Reloc = llvm::dyn_cast<ConstantRelocatable>(Src)) { | 587 } else if (const auto Reloc = llvm::dyn_cast<ConstantRelocatable>(Src)) { |
588 AssemblerFixup *Fixup = | 588 AssemblerFixup *Fixup = Asm->createFixup(llvm::ELF::R_386_32, Reloc); |
589 x86::DisplacementRelocation::create(Asm, FK_Abs_4, Reloc); | |
590 (Asm->*(Emitter.GPRImm))(Ty, VarReg, | 589 (Asm->*(Emitter.GPRImm))(Ty, VarReg, |
591 x86::Immediate(Reloc->getOffset(), Fixup)); | 590 x86::Immediate(Reloc->getOffset(), Fixup)); |
592 } else if (const auto Split = llvm::dyn_cast<VariableSplit>(Src)) { | 591 } else if (const auto Split = llvm::dyn_cast<VariableSplit>(Src)) { |
593 (Asm->*(Emitter.GPRAddr))(Ty, VarReg, Split->toAsmAddress(Func)); | 592 (Asm->*(Emitter.GPRAddr))(Ty, VarReg, Split->toAsmAddress(Func)); |
594 } else { | 593 } else { |
595 llvm_unreachable("Unexpected operand type"); | 594 llvm_unreachable("Unexpected operand type"); |
596 } | 595 } |
597 } | 596 } |
598 | 597 |
599 void emitIASAddrOpTyGPR(const Cfg *Func, Type Ty, const x86::Address &Addr, | 598 void emitIASAddrOpTyGPR(const Cfg *Func, Type Ty, const x86::Address &Addr, |
600 const Operand *Src, | 599 const Operand *Src, |
601 const x86::AssemblerX86::GPREmitterAddrOp &Emitter) { | 600 const x86::AssemblerX86::GPREmitterAddrOp &Emitter) { |
602 x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>(); | 601 x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>(); |
603 // Src can only be Reg or Immediate. | 602 // Src can only be Reg or Immediate. |
604 if (const auto SrcVar = llvm::dyn_cast<Variable>(Src)) { | 603 if (const auto SrcVar = llvm::dyn_cast<Variable>(Src)) { |
605 assert(SrcVar->hasReg()); | 604 assert(SrcVar->hasReg()); |
606 RegX8632::GPRRegister SrcReg = | 605 RegX8632::GPRRegister SrcReg = |
607 RegX8632::getEncodedByteRegOrGPR(Ty, SrcVar->getRegNum()); | 606 RegX8632::getEncodedByteRegOrGPR(Ty, SrcVar->getRegNum()); |
608 (Asm->*(Emitter.AddrGPR))(Ty, Addr, SrcReg); | 607 (Asm->*(Emitter.AddrGPR))(Ty, Addr, SrcReg); |
609 } else if (const auto Imm = llvm::dyn_cast<ConstantInteger32>(Src)) { | 608 } else if (const auto Imm = llvm::dyn_cast<ConstantInteger32>(Src)) { |
610 (Asm->*(Emitter.AddrImm))(Ty, Addr, x86::Immediate(Imm->getValue())); | 609 (Asm->*(Emitter.AddrImm))(Ty, Addr, x86::Immediate(Imm->getValue())); |
611 } else if (const auto Reloc = llvm::dyn_cast<ConstantRelocatable>(Src)) { | 610 } else if (const auto Reloc = llvm::dyn_cast<ConstantRelocatable>(Src)) { |
612 AssemblerFixup *Fixup = | 611 AssemblerFixup *Fixup = Asm->createFixup(llvm::ELF::R_386_32, Reloc); |
613 x86::DisplacementRelocation::create(Asm, FK_Abs_4, Reloc); | |
614 (Asm->*(Emitter.AddrImm))(Ty, Addr, | 612 (Asm->*(Emitter.AddrImm))(Ty, Addr, |
615 x86::Immediate(Reloc->getOffset(), Fixup)); | 613 x86::Immediate(Reloc->getOffset(), Fixup)); |
616 } else { | 614 } else { |
617 llvm_unreachable("Unexpected operand type"); | 615 llvm_unreachable("Unexpected operand type"); |
618 } | 616 } |
619 } | 617 } |
620 | 618 |
621 void emitIASAsAddrOpTyGPR(const Cfg *Func, Type Ty, const Operand *Op0, | 619 void emitIASAsAddrOpTyGPR(const Cfg *Func, Type Ty, const Operand *Op0, |
622 const Operand *Op1, | 620 const Operand *Op1, |
623 const x86::AssemblerX86::GPREmitterAddrOp &Emitter) { | 621 const x86::AssemblerX86::GPREmitterAddrOp &Emitter) { |
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2844 x86::Address OperandX8632Mem::toAsmAddress(Assembler *Asm) const { | 2842 x86::Address OperandX8632Mem::toAsmAddress(Assembler *Asm) const { |
2845 int32_t Disp = 0; | 2843 int32_t Disp = 0; |
2846 AssemblerFixup *Fixup = nullptr; | 2844 AssemblerFixup *Fixup = nullptr; |
2847 // Determine the offset (is it relocatable?) | 2845 // Determine the offset (is it relocatable?) |
2848 if (getOffset()) { | 2846 if (getOffset()) { |
2849 if (const auto CI = llvm::dyn_cast<ConstantInteger32>(getOffset())) { | 2847 if (const auto CI = llvm::dyn_cast<ConstantInteger32>(getOffset())) { |
2850 Disp = static_cast<int32_t>(CI->getValue()); | 2848 Disp = static_cast<int32_t>(CI->getValue()); |
2851 } else if (const auto CR = | 2849 } else if (const auto CR = |
2852 llvm::dyn_cast<ConstantRelocatable>(getOffset())) { | 2850 llvm::dyn_cast<ConstantRelocatable>(getOffset())) { |
2853 Disp = CR->getOffset(); | 2851 Disp = CR->getOffset(); |
2854 Fixup = x86::DisplacementRelocation::create(Asm, FK_Abs_4, CR); | 2852 Fixup = Asm->createFixup(llvm::ELF::R_386_32, CR); |
2855 } else { | 2853 } else { |
2856 llvm_unreachable("Unexpected offset type"); | 2854 llvm_unreachable("Unexpected offset type"); |
2857 } | 2855 } |
2858 } | 2856 } |
2859 | 2857 |
2860 // Now convert to the various possible forms. | 2858 // Now convert to the various possible forms. |
2861 if (getBase() && getIndex()) { | 2859 if (getBase() && getIndex()) { |
2862 return x86::Address(RegX8632::getEncodedGPR(getBase()->getRegNum()), | 2860 return x86::Address(RegX8632::getEncodedGPR(getBase()->getRegNum()), |
2863 RegX8632::getEncodedGPR(getIndex()->getRegNum()), | 2861 RegX8632::getEncodedGPR(getIndex()->getRegNum()), |
2864 x86::ScaleFactor(getShift()), Disp); | 2862 x86::ScaleFactor(getShift()), Disp); |
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2914 } | 2912 } |
2915 Str << "("; | 2913 Str << "("; |
2916 if (Func) | 2914 if (Func) |
2917 Var->dump(Func); | 2915 Var->dump(Func); |
2918 else | 2916 else |
2919 Var->dump(Str); | 2917 Var->dump(Str); |
2920 Str << ")"; | 2918 Str << ")"; |
2921 } | 2919 } |
2922 | 2920 |
2923 } // end of namespace Ice | 2921 } // end of namespace Ice |
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