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| 1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===// | 1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 // | 9 // |
| 10 // This file implements the TargetLoweringX8632 class, which | 10 // This file implements the TargetLoweringX8632 class, which |
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| 662 // * SpillAreaPaddingBytes: area 3 | 662 // * SpillAreaPaddingBytes: area 3 |
| 663 // * GlobalsSize: area 4 | 663 // * GlobalsSize: area 4 |
| 664 // * GlobalsAndSubsequentPaddingSize: areas 4 - 5 | 664 // * GlobalsAndSubsequentPaddingSize: areas 4 - 5 |
| 665 // * LocalsSpillAreaSize: area 6 | 665 // * LocalsSpillAreaSize: area 6 |
| 666 // * SpillAreaSizeBytes: areas 3 - 7 | 666 // * SpillAreaSizeBytes: areas 3 - 7 |
| 667 | 667 |
| 668 // Make a final pass over the Cfg to determine which variables need | 668 // Make a final pass over the Cfg to determine which variables need |
| 669 // stack slots. | 669 // stack slots. |
| 670 llvm::BitVector IsVarReferenced(Func->getNumVariables()); | 670 llvm::BitVector IsVarReferenced(Func->getNumVariables()); |
| 671 for (CfgNode *Node : Func->getNodes()) { | 671 for (CfgNode *Node : Func->getNodes()) { |
| 672 for (auto Inst = Node->getInsts().begin(), E = Node->getInsts().end(); | 672 for (Inst &Inst : Node->getInsts()) { |
| 673 Inst != E; ++Inst) { | 673 if (Inst.isDeleted()) |
| 674 if (Inst->isDeleted()) | |
| 675 continue; | 674 continue; |
| 676 if (const Variable *Var = Inst->getDest()) | 675 if (const Variable *Var = Inst.getDest()) |
| 677 IsVarReferenced[Var->getIndex()] = true; | 676 IsVarReferenced[Var->getIndex()] = true; |
| 678 for (SizeT I = 0; I < Inst->getSrcSize(); ++I) { | 677 for (SizeT I = 0; I < Inst.getSrcSize(); ++I) { |
| 679 Operand *Src = Inst->getSrc(I); | 678 Operand *Src = Inst.getSrc(I); |
| 680 SizeT NumVars = Src->getNumVars(); | 679 SizeT NumVars = Src->getNumVars(); |
| 681 for (SizeT J = 0; J < NumVars; ++J) { | 680 for (SizeT J = 0; J < NumVars; ++J) { |
| 682 const Variable *Var = Src->getVar(J); | 681 const Variable *Var = Src->getVar(J); |
| 683 IsVarReferenced[Var->getIndex()] = true; | 682 IsVarReferenced[Var->getIndex()] = true; |
| 684 } | 683 } |
| 685 } | 684 } |
| 686 } | 685 } |
| 687 } | 686 } |
| 688 | 687 |
| 689 // If SimpleCoalescing is false, each variable without a register | 688 // If SimpleCoalescing is false, each variable without a register |
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| 4148 InstCall *Call = makeHelperCall("ice_unreachable", Dest, MaxSrcs); | 4147 InstCall *Call = makeHelperCall("ice_unreachable", Dest, MaxSrcs); |
| 4149 lowerCall(Call); | 4148 lowerCall(Call); |
| 4150 } | 4149 } |
| 4151 | 4150 |
| 4152 // Turn an i64 Phi instruction into a pair of i32 Phi instructions, to | 4151 // Turn an i64 Phi instruction into a pair of i32 Phi instructions, to |
| 4153 // preserve integrity of liveness analysis. Undef values are also | 4152 // preserve integrity of liveness analysis. Undef values are also |
| 4154 // turned into zeroes, since loOperand() and hiOperand() don't expect | 4153 // turned into zeroes, since loOperand() and hiOperand() don't expect |
| 4155 // Undef input. | 4154 // Undef input. |
| 4156 void TargetX8632::prelowerPhis() { | 4155 void TargetX8632::prelowerPhis() { |
| 4157 CfgNode *Node = Context.getNode(); | 4156 CfgNode *Node = Context.getNode(); |
| 4158 for (auto I = Node->getPhis().begin(), E = Node->getPhis().end(); I != E; | 4157 for (Inst &I : Node->getPhis()) { |
| 4159 ++I) { | 4158 auto Phi = llvm::dyn_cast<InstPhi>(&I); |
| 4160 auto Phi = llvm::dyn_cast<InstPhi>(I); | |
| 4161 if (Phi->isDeleted()) | 4159 if (Phi->isDeleted()) |
| 4162 continue; | 4160 continue; |
| 4163 Variable *Dest = Phi->getDest(); | 4161 Variable *Dest = Phi->getDest(); |
| 4164 if (Dest->getType() == IceType_i64) { | 4162 if (Dest->getType() == IceType_i64) { |
| 4165 Variable *DestLo = llvm::cast<Variable>(loOperand(Dest)); | 4163 Variable *DestLo = llvm::cast<Variable>(loOperand(Dest)); |
| 4166 Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest)); | 4164 Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest)); |
| 4167 InstPhi *PhiLo = InstPhi::create(Func, Phi->getSrcSize(), DestLo); | 4165 InstPhi *PhiLo = InstPhi::create(Func, Phi->getSrcSize(), DestLo); |
| 4168 InstPhi *PhiHi = InstPhi::create(Func, Phi->getSrcSize(), DestHi); | 4166 InstPhi *PhiHi = InstPhi::create(Func, Phi->getSrcSize(), DestHi); |
| 4169 for (SizeT I = 0; I < Phi->getSrcSize(); ++I) { | 4167 for (SizeT I = 0; I < Phi->getSrcSize(); ++I) { |
| 4170 Operand *Src = Phi->getSrc(I); | 4168 Operand *Src = Phi->getSrc(I); |
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| 4214 // available (not live) at the beginning of the successor block, | 4212 // available (not live) at the beginning of the successor block, |
| 4215 // minus all registers used as Dest operands in the Assignments. To | 4213 // minus all registers used as Dest operands in the Assignments. To |
| 4216 // do this, we start off assuming all registers are available, then | 4214 // do this, we start off assuming all registers are available, then |
| 4217 // iterate through the Assignments and remove Dest registers. | 4215 // iterate through the Assignments and remove Dest registers. |
| 4218 // During this iteration, we also determine whether we will actually | 4216 // During this iteration, we also determine whether we will actually |
| 4219 // need any extra registers for memory-to-memory copies. If so, we | 4217 // need any extra registers for memory-to-memory copies. If so, we |
| 4220 // do the actual work of removing the live-in registers from the | 4218 // do the actual work of removing the live-in registers from the |
| 4221 // set. TODO(stichnot): This work is being repeated for every split | 4219 // set. TODO(stichnot): This work is being repeated for every split |
| 4222 // edge to the successor, so consider updating LiveIn just once | 4220 // edge to the successor, so consider updating LiveIn just once |
| 4223 // after all the edges are split. | 4221 // after all the edges are split. |
| 4224 for (auto I = Assignments.begin(), E = Assignments.end(); I != E; ++I) { | 4222 for (const Inst &I : Assignments) { |
| 4225 Variable *Dest = I->getDest(); | 4223 Variable *Dest = I.getDest(); |
| 4226 if (Dest->hasReg()) { | 4224 if (Dest->hasReg()) { |
| 4227 Available[Dest->getRegNum()] = false; | 4225 Available[Dest->getRegNum()] = false; |
| 4228 } else if (isMemoryOperand(I->getSrc(0))) { | 4226 } else if (isMemoryOperand(I.getSrc(0))) { |
| 4229 NeedsRegs = true; // Src and Dest are both in memory | 4227 NeedsRegs = true; // Src and Dest are both in memory |
| 4230 } | 4228 } |
| 4231 } | 4229 } |
| 4232 if (NeedsRegs) { | 4230 if (NeedsRegs) { |
| 4233 LivenessBV &LiveIn = Func->getLiveness()->getLiveIn(Succ); | 4231 LivenessBV &LiveIn = Func->getLiveness()->getLiveIn(Succ); |
| 4234 for (int i = LiveIn.find_first(); i != -1; i = LiveIn.find_next(i)) { | 4232 for (int i = LiveIn.find_first(); i != -1; i = LiveIn.find_next(i)) { |
| 4235 Variable *Var = Func->getLiveness()->getVariable(i, Succ); | 4233 Variable *Var = Func->getLiveness()->getVariable(i, Succ); |
| 4236 if (Var->hasReg()) | 4234 if (Var->hasReg()) |
| 4237 Available[Var->getRegNum()] = false; | 4235 Available[Var->getRegNum()] = false; |
| 4238 } | 4236 } |
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| 4719 } else if (IsConstant || IsExternal) | 4717 } else if (IsConstant || IsExternal) |
| 4720 Str << "\t.zero\t" << Size << "\n"; | 4718 Str << "\t.zero\t" << Size << "\n"; |
| 4721 // Size is part of .comm. | 4719 // Size is part of .comm. |
| 4722 | 4720 |
| 4723 if (IsConstant || HasNonzeroInitializer || IsExternal) | 4721 if (IsConstant || HasNonzeroInitializer || IsExternal) |
| 4724 Str << "\t.size\t" << MangledName << ", " << Size << "\n"; | 4722 Str << "\t.size\t" << MangledName << ", " << Size << "\n"; |
| 4725 // Size is part of .comm. | 4723 // Size is part of .comm. |
| 4726 } | 4724 } |
| 4727 | 4725 |
| 4728 } // end of namespace Ice | 4726 } // end of namespace Ice |
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