Improve generated MIPS code for conditional expressions and branches by delaying

runtime/vm/intrinsifier_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_MIPS.
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/intrinsifier.h"
 
 #include "vm/assembler.h"
@@ skipping 667 matching lines @@
   __ BranchNotEqual(CMPRES1, Immediate(kMintCid), not_smi_or_mint);
 
   // Mint.
   __ lw(res_lo, FieldAddress(reg, Mint::value_offset()));
   __ lw(res_hi, FieldAddress(reg, Mint::value_offset() + kWordSize));
   __ Bind(&done);
   return;
 }
 
 
-static void CompareIntegers(Assembler* assembler, Condition true_condition) {
+static void CompareIntegers(Assembler* assembler, RelationOperator rel_op) {
   Label try_mint_smi, is_true, is_false, drop_two_fall_through, fall_through;
   TestBothArgumentsSmis(assembler, &try_mint_smi);
   // T0 contains the right argument. T1 contains left argument
 
-  switch (true_condition) {
+  switch (rel_op) {
     case LT: __ BranchSignedLess(T1, T0, &is_true); break;
     case LE: __ BranchSignedLessEqual(T1, T0, &is_true); break;
     case GT: __ BranchSignedGreater(T1, T0, &is_true); break;
     case GE: __ BranchSignedGreaterEqual(T1, T0, &is_true); break;
     default:
       UNREACHABLE();
       break;
   }
 
   __ Bind(&is_false);
   __ LoadObject(V0, Bool::False());
   __ Ret();
   __ Bind(&is_true);
   __ LoadObject(V0, Bool::True());
   __ Ret();
 
   __ Bind(&try_mint_smi);
   // Get left as 64 bit integer.
   Get64SmiOrMint(assembler, T3, T2, T1, &fall_through);
   // Get right as 64 bit integer.
   Get64SmiOrMint(assembler, T5, T4, T0, &fall_through);
   // T3: left high.
   // T2: left low.
   // T5: right high.
   // T4: right low.
 
   // 64-bit comparison
-  // Condition hi_true_cond, hi_false_cond, lo_false_cond;
-  switch (true_condition) {
+  switch (rel_op) {
     case LT:
     case LE: {
       // Compare left hi, right high.
       __ BranchSignedGreater(T3, T5, &is_false);
       __ BranchSignedLess(T3, T5, &is_true);
       // Compare left lo, right lo.
-      if (true_condition == LT) {
+      if (rel_op == LT) {
         __ BranchUnsignedGreaterEqual(T2, T4, &is_false);
       } else {
         __ BranchUnsignedGreater(T2, T4, &is_false);
       }
       break;
     }
     case GT:
     case GE: {
       // Compare left hi, right high.
       __ BranchSignedLess(T3, T5, &is_false);
       __ BranchSignedGreater(T3, T5, &is_true);
       // Compare left lo, right lo.
-      if (true_condition == GT) {
+      if (rel_op == GT) {
         __ BranchUnsignedLessEqual(T2, T4, &is_false);
       } else {
         __ BranchUnsignedLess(T2, T4, &is_false);
       }
       break;
     }
     default:
       UNREACHABLE();
       break;
   }
   // Else is true.
   __ b(&is_true);
 
   __ Bind(&fall_through);
 }
 
 
 void Intrinsifier::Integer_greaterThanFromInt(Assembler* assembler) {
   CompareIntegers(assembler, LT);
 }
 
 
 void Intrinsifier::Integer_lessThan(Assembler* assembler) {
-  Integer_greaterThanFromInt(assembler);
+  CompareIntegers(assembler, LT);
 }
 
 
 void Intrinsifier::Integer_greaterThan(Assembler* assembler) {
   CompareIntegers(assembler, GT);
 }
 
 
 void Intrinsifier::Integer_lessEqualThan(Assembler* assembler) {
   CompareIntegers(assembler, LE);
@@ skipping 560 matching lines @@
   __ LoadClassId(CMPRES1, T0);
   __ BranchNotEqual(CMPRES1, Immediate(kDoubleCid), not_double_smi);
   // Fall through with Double in T0.
 }
 
 
 // Both arguments on stack, arg0 (left) is a double, arg1 (right) is of unknown
 // type. Return true or false object in the register V0. Any NaN argument
 // returns false. Any non-double arg1 causes control flow to fall through to the
 // slow case (compiled method body).
-static void CompareDoubles(Assembler* assembler, Condition true_condition) {
+static void CompareDoubles(Assembler* assembler, RelationOperator rel_op) {
   Label is_smi, double_op, no_NaN, fall_through;
   __ Comment("CompareDoubles Intrinsic");
 
   TestLastArgumentIsDouble(assembler, &is_smi, &fall_through);
   // Both arguments are double, right operand is in T0.
   __ LoadDFromOffset(D1, T0, Double::value_offset() - kHeapObjectTag);
   __ Bind(&double_op);
   __ lw(T0, Address(SP, 1 * kWordSize));  // Left argument.
   __ LoadDFromOffset(D0, T0, Double::value_offset() - kHeapObjectTag);
   // Now, left is in D0, right is in D1.
 
   __ cund(D0, D1);  // Check for NaN.
   __ bc1f(&no_NaN);
   __ LoadObject(V0, Bool::False());  // Return false if either is NaN.
   __ Ret();
   __ Bind(&no_NaN);
 
-  switch (true_condition) {
+  switch (rel_op) {
     case EQ: __ ceqd(D0, D1); break;
     case LT: __ coltd(D0, D1); break;
     case LE: __ coled(D0, D1); break;
     case GT: __ coltd(D1, D0); break;
     case GE: __ coled(D1, D0); break;
     default: {
       // Only passing the above conditions to this function.
       UNREACHABLE();
       break;
     }
@@ skipping 764 matching lines @@
   Isolate* isolate = Isolate::Current();
   __ LoadImmediate(V0, reinterpret_cast<uword>(isolate));
   // Set return value.
   __ Ret();
   __ delay_slot()->lw(V0, Address(V0, Isolate::current_tag_offset()));
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS