Improve generated MIPS code for conditional expressions and branches by delaying

runtime/vm/constants_mips.h

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #ifndef VM_CONSTANTS_MIPS_H_
 #define VM_CONSTANTS_MIPS_H_
 
 #include "platform/assert.h"
 
 namespace dart {
@@ skipping 27 matching lines @@
   R23 = 23,
   R24 = 24,
   R25 = 25,
   R26 = 26,
   R27 = 27,
   R28 = 28,
   R29 = 29,
   R30 = 30,
   R31 = 31,
   kNumberOfCpuRegisters = 32,
+  IMM = 32,  // Positive value is easier to encode than kNoRegister in bitfield.
   kNoRegister = -1,
 
   // Register aliases.
   ZR = R0,
   AT = R1,
 
   V0 = R2,
   V1 = R3,
 
   A0 = R4,
@@ skipping 171 matching lines @@
 const int kDartVolatileCpuRegCount = 14;
 const Register kDartFirstVolatileCpuReg = R2;
 const Register kDartLastVolatileCpuReg = R15;
 
 // FPU registers 0 - 19 are not preserved across calls.
 const FRegister kDartFirstVolatileFpuReg = F0;
 const FRegister kDartLastVolatileFpuReg = F19;
 const int kDartVolatileFpuRegCount = 20;
 
 
-// Values for the condition field.
-// There is no condition field on MIPS, but Conditions are used and passed
-// around by the intermediate language, so we need them here, too.
-enum Condition {
+// There is no status register on MIPS. Instead of representing a condition
+// code, type Condition (see assembler_mips.h) represents a pair of operands and
+// a relation operator between them.
+enum RelationOperator {
+  AL,  // always
+  NV,  // never
   EQ,  // equal
   NE,  // not equal
   GT,  // greater than
   GE,  // greater equal
   LT,  // less than
   LE,  // less equal
-  VS,  // overflow
+  UGT,  // unsigned greater than
+  UGE,  // unsigned greater equal
+  ULT,  // unsigned less than
+  ULE,  // unsigned less equal
 };
 
 
 // Constants used for the decoding or encoding of the individual fields of
 // instructions. Based on the "Table 4.25 CPU Instruction Format Fields".
 enum InstructionFields {
   kOpcodeShift = 26,
   kOpcodeBits = 6,
   kRsShift = 21,
   kRsBits = 5,
@@ skipping 94 matching lines @@
   SLLV = 4,
   SRLV = 6,
   SRAV = 7,
   JR = 8,
   JALR = 9,
   MOVZ = 10,
   MOVN = 11,
   SYSCALL = 12,
   BREAK = 13,
   SYNC = 15,
-  MFHI =16,
+  MFHI = 16,
   MTHI = 17,
   MFLO = 18,
   MTLO = 19,
   MULT = 24,
   MULTU = 25,
   DIV = 26,
   DIVU = 27,
   ADD = 32,
   ADDU = 33,
   SUB = 34,
@@ skipping 258 matching lines @@
 #endif  // defined(DEBUG)
 
  private:
   DISALLOW_ALLOCATION();
   DISALLOW_IMPLICIT_CONSTRUCTORS(Instr);
 };
 
 }  // namespace dart
 
 #endif  // VM_CONSTANTS_MIPS_H_