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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_MIPS. | 5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_MIPS. |
6 #if defined(TARGET_ARCH_MIPS) | 6 #if defined(TARGET_ARCH_MIPS) |
7 | 7 |
8 #include "vm/flow_graph_compiler.h" | 8 #include "vm/flow_graph_compiler.h" |
9 | 9 |
10 #include "vm/ast_printer.h" | 10 #include "vm/ast_printer.h" |
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1388 __ Drop(argument_count); | 1388 __ Drop(argument_count); |
1389 } | 1389 } |
1390 | 1390 |
1391 | 1391 |
1392 Condition FlowGraphCompiler::EmitEqualityRegConstCompare( | 1392 Condition FlowGraphCompiler::EmitEqualityRegConstCompare( |
1393 Register reg, | 1393 Register reg, |
1394 const Object& obj, | 1394 const Object& obj, |
1395 bool needs_number_check, | 1395 bool needs_number_check, |
1396 intptr_t token_pos) { | 1396 intptr_t token_pos) { |
1397 __ TraceSimMsg("EqualityRegConstCompare"); | 1397 __ TraceSimMsg("EqualityRegConstCompare"); |
1398 ASSERT(!needs_number_check || | |
1399 (!obj.IsMint() && !obj.IsDouble() && !obj.IsBigint())); | |
1398 if (needs_number_check) { | 1400 if (needs_number_check) { |
1399 StubCode* stub_code = isolate()->stub_code(); | 1401 StubCode* stub_code = isolate()->stub_code(); |
1400 ASSERT(!obj.IsMint() && !obj.IsDouble() && !obj.IsBigint()); | 1402 ASSERT(!obj.IsMint() && !obj.IsDouble() && !obj.IsBigint()); |
1401 __ addiu(SP, SP, Immediate(-2 * kWordSize)); | 1403 __ addiu(SP, SP, Immediate(-2 * kWordSize)); |
1402 __ sw(reg, Address(SP, 1 * kWordSize)); | 1404 __ sw(reg, Address(SP, 1 * kWordSize)); |
1403 __ LoadObject(TMP, obj); | 1405 __ LoadObject(TMP, obj); |
1404 __ sw(TMP, Address(SP, 0 * kWordSize)); | 1406 __ sw(TMP, Address(SP, 0 * kWordSize)); |
1405 if (is_optimizing()) { | 1407 if (is_optimizing()) { |
1406 __ BranchLinkPatchable( | 1408 __ BranchLinkPatchable( |
1407 &stub_code->OptimizedIdenticalWithNumberCheckLabel()); | 1409 &stub_code->OptimizedIdenticalWithNumberCheckLabel()); |
1408 } else { | 1410 } else { |
1409 __ BranchLinkPatchable( | 1411 __ BranchLinkPatchable( |
1410 &stub_code->UnoptimizedIdenticalWithNumberCheckLabel()); | 1412 &stub_code->UnoptimizedIdenticalWithNumberCheckLabel()); |
1411 } | 1413 } |
1412 if (token_pos != Scanner::kNoSourcePos) { | 1414 if (token_pos != Scanner::kNoSourcePos) { |
1413 AddCurrentDescriptor(RawPcDescriptors::kRuntimeCall, | 1415 AddCurrentDescriptor(RawPcDescriptors::kRuntimeCall, |
1414 Isolate::kNoDeoptId, | 1416 Isolate::kNoDeoptId, |
1415 token_pos); | 1417 token_pos); |
1416 } | 1418 } |
1417 __ TraceSimMsg("EqualityRegConstCompare return"); | 1419 __ TraceSimMsg("EqualityRegConstCompare return"); |
1418 // Stub returns result in CMPRES1 (if it is 0, then reg and obj are | 1420 // Stub returns result in CMPRES1 (if it is 0, then reg and obj are |
1419 // equal) and always sets CMPRES2 to 0. | 1421 // equal). |
1420 __ lw(reg, Address(SP, 1 * kWordSize)); // Restore 'reg'. | 1422 __ lw(reg, Address(SP, 1 * kWordSize)); // Restore 'reg'. |
1421 __ addiu(SP, SP, Immediate(2 * kWordSize)); // Discard constant. | 1423 __ addiu(SP, SP, Immediate(2 * kWordSize)); // Discard constant. |
1424 return Condition(CMPRES1, ZR, EQ); | |
1422 } else { | 1425 } else { |
1423 __ CompareObject(CMPRES1, CMPRES2, reg, obj); | 1426 Register obj_reg = CMPRES1; |
1427 int16_t imm = 0; | |
1428 if (obj.IsSmi()) { | |
zra
2014/12/19 17:49:47
Code like this (from here down to the LoadObject)
regis
2014/12/22 20:17:34
There are 3 places with similar code. I moved the
| |
1429 int32_t val = reinterpret_cast<int32_t>(obj.raw()); | |
1430 if (val == 0) { | |
1431 obj_reg = ZR; | |
1432 } else if (Condition::IsValidImm(val)) { | |
1433 obj_reg = IMM; | |
1434 imm = val; | |
1435 } | |
1436 } | |
1437 if (obj_reg == CMPRES1) { | |
1438 __ LoadObject(obj_reg, obj); | |
1439 } | |
1440 return Condition(reg, obj_reg, EQ, imm); | |
1424 } | 1441 } |
1425 return EQ; | |
1426 } | 1442 } |
1427 | 1443 |
1428 | 1444 |
1429 Condition FlowGraphCompiler::EmitEqualityRegRegCompare(Register left, | 1445 Condition FlowGraphCompiler::EmitEqualityRegRegCompare(Register left, |
1430 Register right, | 1446 Register right, |
1431 bool needs_number_check, | 1447 bool needs_number_check, |
1432 intptr_t token_pos) { | 1448 intptr_t token_pos) { |
1433 __ TraceSimMsg("EqualityRegRegCompare"); | 1449 __ TraceSimMsg("EqualityRegRegCompare"); |
1434 __ Comment("EqualityRegRegCompare"); | 1450 __ Comment("EqualityRegRegCompare"); |
1435 if (needs_number_check) { | 1451 if (needs_number_check) { |
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1451 } | 1467 } |
1452 #if defined(DEBUG) | 1468 #if defined(DEBUG) |
1453 if (!is_optimizing()) { | 1469 if (!is_optimizing()) { |
1454 // Do this *after* adding the pc descriptor! | 1470 // Do this *after* adding the pc descriptor! |
1455 __ LoadImmediate(S4, kInvalidObjectPointer); | 1471 __ LoadImmediate(S4, kInvalidObjectPointer); |
1456 __ LoadImmediate(S5, kInvalidObjectPointer); | 1472 __ LoadImmediate(S5, kInvalidObjectPointer); |
1457 } | 1473 } |
1458 #endif | 1474 #endif |
1459 __ TraceSimMsg("EqualityRegRegCompare return"); | 1475 __ TraceSimMsg("EqualityRegRegCompare return"); |
1460 // Stub returns result in CMPRES1 (if it is 0, then left and right are | 1476 // Stub returns result in CMPRES1 (if it is 0, then left and right are |
1461 // equal) and always sets CMPRES2 to 0. | 1477 // equal). |
1462 __ lw(right, Address(SP, 0 * kWordSize)); | 1478 __ lw(right, Address(SP, 0 * kWordSize)); |
1463 __ lw(left, Address(SP, 1 * kWordSize)); | 1479 __ lw(left, Address(SP, 1 * kWordSize)); |
1464 __ addiu(SP, SP, Immediate(2 * kWordSize)); | 1480 __ addiu(SP, SP, Immediate(2 * kWordSize)); |
1481 return Condition(CMPRES1, ZR, EQ); | |
1465 } else { | 1482 } else { |
1466 __ slt(CMPRES1, left, right); | 1483 return Condition(left, right, EQ); |
1467 __ slt(CMPRES2, right, left); | |
1468 } | 1484 } |
1469 return EQ; | |
1470 } | 1485 } |
1471 | 1486 |
1472 | 1487 |
1473 // This function must be in sync with FlowGraphCompiler::RecordSafepoint and | 1488 // This function must be in sync with FlowGraphCompiler::RecordSafepoint and |
1474 // FlowGraphCompiler::SlowPathEnvironmentFor. | 1489 // FlowGraphCompiler::SlowPathEnvironmentFor. |
1475 void FlowGraphCompiler::SaveLiveRegisters(LocationSummary* locs) { | 1490 void FlowGraphCompiler::SaveLiveRegisters(LocationSummary* locs) { |
1476 #if defined(DEBUG) | 1491 #if defined(DEBUG) |
1477 locs->CheckWritableInputs(); | 1492 locs->CheckWritableInputs(); |
1478 ClobberDeadTempRegisters(locs); | 1493 ClobberDeadTempRegisters(locs); |
1479 #endif | 1494 #endif |
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1861 __ AddImmediate(SP, kDoubleSize); | 1876 __ AddImmediate(SP, kDoubleSize); |
1862 } | 1877 } |
1863 | 1878 |
1864 | 1879 |
1865 #undef __ | 1880 #undef __ |
1866 | 1881 |
1867 | 1882 |
1868 } // namespace dart | 1883 } // namespace dart |
1869 | 1884 |
1870 #endif // defined TARGET_ARCH_MIPS | 1885 #endif // defined TARGET_ARCH_MIPS |
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