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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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75 if (cpu.part() == base::CPU::PPC_POWER6 || | 75 if (cpu.part() == base::CPU::PPC_POWER6 || |
76 cpu.part() == base::CPU::PPC_POWER7 || | 76 cpu.part() == base::CPU::PPC_POWER7 || |
77 cpu.part() == base::CPU::PPC_POWER8) { | 77 cpu.part() == base::CPU::PPC_POWER8) { |
78 supported_ |= (1u << LWSYNC); | 78 supported_ |= (1u << LWSYNC); |
79 } | 79 } |
80 #if V8_OS_LINUX | 80 #if V8_OS_LINUX |
81 if (!(cpu.part() == base::CPU::PPC_G5 || cpu.part() == base::CPU::PPC_G4)) { | 81 if (!(cpu.part() == base::CPU::PPC_G5 || cpu.part() == base::CPU::PPC_G4)) { |
82 // Assume support | 82 // Assume support |
83 supported_ |= (1u << FPU); | 83 supported_ |= (1u << FPU); |
84 } | 84 } |
85 if (cpu.cache_line_size() != 0) { | |
86 cache_line_size_ = cpu.cache_line_size(); | |
87 } | |
88 #elif V8_OS_AIX | 85 #elif V8_OS_AIX |
89 // Assume support FP support and default cache line size | 86 // Assume support FP support and default cache line size |
90 supported_ |= (1u << FPU); | 87 supported_ |= (1u << FPU); |
91 #endif | 88 #endif |
92 #else // Simulator | 89 #else // Simulator |
93 supported_ |= (1u << FPU); | 90 supported_ |= (1u << FPU); |
94 supported_ |= (1u << LWSYNC); | 91 supported_ |= (1u << LWSYNC); |
95 #if V8_TARGET_ARCH_PPC64 | 92 #if V8_TARGET_ARCH_PPC64 |
96 supported_ |= (1u << FPR_GPR_MOV); | 93 supported_ |= (1u << FPR_GPR_MOV); |
97 #endif | 94 #endif |
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1415 DCHECK(mcode < F_NEXT_AVAILABLE_STUB_MARKER); | 1412 DCHECK(mcode < F_NEXT_AVAILABLE_STUB_MARKER); |
1416 emit(FAKE_OPCODE | MARKER_SUBOPCODE | mcode); | 1413 emit(FAKE_OPCODE | MARKER_SUBOPCODE | mcode); |
1417 } | 1414 } |
1418 } | 1415 } |
1419 | 1416 |
1420 | 1417 |
1421 // Function descriptor for AIX. | 1418 // Function descriptor for AIX. |
1422 // Code address skips the function descriptor "header". | 1419 // Code address skips the function descriptor "header". |
1423 // TOC and static chain are ignored and set to 0. | 1420 // TOC and static chain are ignored and set to 0. |
1424 void Assembler::function_descriptor() { | 1421 void Assembler::function_descriptor() { |
| 1422 #if ABI_USES_FUNCTION_DESCRIPTORS |
1425 DCHECK(pc_offset() == 0); | 1423 DCHECK(pc_offset() == 0); |
1426 RecordRelocInfo(RelocInfo::INTERNAL_REFERENCE); | 1424 RecordRelocInfo(RelocInfo::INTERNAL_REFERENCE); |
1427 emit_ptr(reinterpret_cast<uintptr_t>(pc_) + 3 * kPointerSize); | 1425 emit_ptr(reinterpret_cast<uintptr_t>(pc_) + 3 * kPointerSize); |
1428 emit_ptr(0); | 1426 emit_ptr(0); |
1429 emit_ptr(0); | 1427 emit_ptr(0); |
| 1428 #endif |
1430 } | 1429 } |
1431 | 1430 |
1432 | 1431 |
1433 #if ABI_USES_FUNCTION_DESCRIPTORS || V8_OOL_CONSTANT_POOL | 1432 #if ABI_USES_FUNCTION_DESCRIPTORS || V8_OOL_CONSTANT_POOL |
1434 void Assembler::RelocateInternalReference(Address pc, intptr_t delta, | 1433 void Assembler::RelocateInternalReference(Address pc, intptr_t delta, |
1435 Address code_start, | 1434 Address code_start, |
1436 ICacheFlushMode icache_flush_mode) { | 1435 ICacheFlushMode icache_flush_mode) { |
1437 DCHECK(delta || code_start); | 1436 DCHECK(delta || code_start); |
1438 #if ABI_USES_FUNCTION_DESCRIPTORS | 1437 #if ABI_USES_FUNCTION_DESCRIPTORS |
1439 uintptr_t* fd = reinterpret_cast<uintptr_t*>(pc); | 1438 uintptr_t* fd = reinterpret_cast<uintptr_t*>(pc); |
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2484 | 2483 |
2485 // Patch load instruction with correct offset. | 2484 // Patch load instruction with correct offset. |
2486 Assembler::SetConstantPoolOffset(rinfo.pc(), offset); | 2485 Assembler::SetConstantPoolOffset(rinfo.pc(), offset); |
2487 } | 2486 } |
2488 } | 2487 } |
2489 #endif | 2488 #endif |
2490 } | 2489 } |
2491 } // namespace v8::internal | 2490 } // namespace v8::internal |
2492 | 2491 |
2493 #endif // V8_TARGET_ARCH_PPC | 2492 #endif // V8_TARGET_ARCH_PPC |
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