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Issue 817143002: Contribution of PowerPC port (continuation of 422063005) (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Contribution of PowerPC port - rebase and address initial set of comments Created 5 years, 11 months ago
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1 // Copyright 2006-2013 the V8 project authors. All rights reserved. 1 // Copyright 2006-2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 // This module contains the architecture-specific code. This make the rest of 5 // This module contains the architecture-specific code. This make the rest of
6 // the code less dependent on differences between different processor 6 // the code less dependent on differences between different processor
7 // architecture. 7 // architecture.
8 // The classes have the same definition for all architectures. The 8 // The classes have the same definition for all architectures. The
9 // implementation for a particular architecture is put in cpu_<arch>.cc. 9 // implementation for a particular architecture is put in cpu_<arch>.cc.
10 // The build system then uses the implementation for the target architecture. 10 // The build system then uses the implementation for the target architecture.
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43 43
44 // arm implementer/part information 44 // arm implementer/part information
45 int implementer() const { return implementer_; } 45 int implementer() const { return implementer_; }
46 static const int ARM = 0x41; 46 static const int ARM = 0x41;
47 static const int NVIDIA = 0x4e; 47 static const int NVIDIA = 0x4e;
48 static const int QUALCOMM = 0x51; 48 static const int QUALCOMM = 0x51;
49 int architecture() const { return architecture_; } 49 int architecture() const { return architecture_; }
50 int variant() const { return variant_; } 50 int variant() const { return variant_; }
51 static const int NVIDIA_DENVER = 0x0; 51 static const int NVIDIA_DENVER = 0x0;
52 int part() const { return part_; } 52 int part() const { return part_; }
53
54 // ARM-specific part codes
53 static const int ARM_CORTEX_A5 = 0xc05; 55 static const int ARM_CORTEX_A5 = 0xc05;
54 static const int ARM_CORTEX_A7 = 0xc07; 56 static const int ARM_CORTEX_A7 = 0xc07;
55 static const int ARM_CORTEX_A8 = 0xc08; 57 static const int ARM_CORTEX_A8 = 0xc08;
56 static const int ARM_CORTEX_A9 = 0xc09; 58 static const int ARM_CORTEX_A9 = 0xc09;
57 static const int ARM_CORTEX_A12 = 0xc0c; 59 static const int ARM_CORTEX_A12 = 0xc0c;
58 static const int ARM_CORTEX_A15 = 0xc0f; 60 static const int ARM_CORTEX_A15 = 0xc0f;
59 61
62 // PPC-specific part codes
63 enum {
64 PPC_POWER5,
65 PPC_POWER6,
66 PPC_POWER7,
67 PPC_POWER8,
68 PPC_G4,
69 PPC_G5,
70 PPC_PA6T
71 };
72
60 // General features 73 // General features
61 bool has_fpu() const { return has_fpu_; } 74 bool has_fpu() const { return has_fpu_; }
62 75
63 // x86 features 76 // x86 features
64 bool has_cmov() const { return has_cmov_; } 77 bool has_cmov() const { return has_cmov_; }
65 bool has_sahf() const { return has_sahf_; } 78 bool has_sahf() const { return has_sahf_; }
66 bool has_mmx() const { return has_mmx_; } 79 bool has_mmx() const { return has_mmx_; }
67 bool has_sse() const { return has_sse_; } 80 bool has_sse() const { return has_sse_; }
68 bool has_sse2() const { return has_sse2_; } 81 bool has_sse2() const { return has_sse2_; }
69 bool has_sse3() const { return has_sse3_; } 82 bool has_sse3() const { return has_sse3_; }
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113 bool has_thumb2_; 126 bool has_thumb2_;
114 bool has_vfp_; 127 bool has_vfp_;
115 bool has_vfp3_; 128 bool has_vfp3_;
116 bool has_vfp3_d32_; 129 bool has_vfp3_d32_;
117 bool is_fp64_mode_; 130 bool is_fp64_mode_;
118 }; 131 };
119 132
120 } } // namespace v8::base 133 } } // namespace v8::base
121 134
122 #endif // V8_BASE_CPU_H_ 135 #endif // V8_BASE_CPU_H_
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