src/base/cpu.h - Issue 817143002: Contribution of PowerPC port (continuation of 422063005)

Side by Side Diff: src/base/cpu.h

Issue 817143002: Contribution of PowerPC port (continuation of 422063005) (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master

Patch Set: Created 6 years ago

Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.

Jump to:

View unified diff | Download patch

OLD	NEW
1 // Copyright 2006-2013 the V8 project authors. All rights reserved.	1 // Copyright 2006-2013 the V8 project authors. All rights reserved.

2 // Use of this source code is governed by a BSD-style license that can be	2 // Use of this source code is governed by a BSD-style license that can be

3 // found in the LICENSE file.	3 // found in the LICENSE file.

4	4

5 // This module contains the architecture-specific code. This make the rest of	5 // This module contains the architecture-specific code. This make the rest of

6 // the code less dependent on differences between different processor	6 // the code less dependent on differences between different processor

7 // architecture.	7 // architecture.

8 // The classes have the same definition for all architectures. The	8 // The classes have the same definition for all architectures. The

9 // implementation for a particular architecture is put in cpu_<arch>.cc.	9 // implementation for a particular architecture is put in cpu_<arch>.cc.

10 // The build system then uses the implementation for the target architecture.	10 // The build system then uses the implementation for the target architecture.

(...skipping 30 matching lines...) Expand all Loading...
41 int ext_family() const { return ext_family_; }	41 int ext_family() const { return ext_family_; }

42 int type() const { return type_; }	42 int type() const { return type_; }

43	43

44 // arm implementer/part information	44 // arm implementer/part information

45 int implementer() const { return implementer_; }	45 int implementer() const { return implementer_; }

46 static const int ARM = 0x41;	46 static const int ARM = 0x41;

47 static const int NVIDIA = 0x4e;	47 static const int NVIDIA = 0x4e;

48 static const int QUALCOMM = 0x51;	48 static const int QUALCOMM = 0x51;

49 int architecture() const { return architecture_; }	49 int architecture() const { return architecture_; }

50 int part() const { return part_; }	50 int part() const { return part_; }

	51 int cache_line_size() const { return cache_line_size_; }
	Sven Panne 2015/01/08 10:13:53 We need to be more specific here which kind of c We need to be more specific here which kind of cache we refer to (I or D), see cpu-arm64.cc. You basically have 2 options: * Hide the cache line size handling in cpu-ppc.cc, just like cpu-arm64.cc. We can then later handle this in a unified way in the CPU class and remember it in CpuFeatures. * Do the unification already now. As it is, it makes things more confusing, because we are half-way between those options. michael_dawson 2015/01/08 23:51:11 This change is an optimization only needed for som Show quoted text On 2015/01/08 10:13:53, Sven Panne wrote: > We need to be more specific here which kind of cache we refer to (I or D), see > cpu-arm64.cc. You basically have 2 options: > > * Hide the cache line size handling in cpu-ppc.cc, just like cpu-arm64.cc. We > can then later handle this in a unified way in the CPU class and remember it in > CpuFeatures. > > * Do the unification already now. > > As it is, it makes things more confusing, because we are half-way between those > options. This change is an optimization only needed for some ppc processors, as such I'd like to leave it out of this set of changes for the port and we can contribute in a later change were we can figure out which of the options is the way to go. I'll remove it from the next patch
	52

	53 // ARM-specific part codes

51 static const int ARM_CORTEX_A5 = 0xc05;	54 static const int ARM_CORTEX_A5 = 0xc05;

52 static const int ARM_CORTEX_A7 = 0xc07;	55 static const int ARM_CORTEX_A7 = 0xc07;

53 static const int ARM_CORTEX_A8 = 0xc08;	56 static const int ARM_CORTEX_A8 = 0xc08;

54 static const int ARM_CORTEX_A9 = 0xc09;	57 static const int ARM_CORTEX_A9 = 0xc09;

55 static const int ARM_CORTEX_A12 = 0xc0c;	58 static const int ARM_CORTEX_A12 = 0xc0c;

56 static const int ARM_CORTEX_A15 = 0xc0f;	59 static const int ARM_CORTEX_A15 = 0xc0f;

57	60

	61 // PPC-specific part codes

	62 enum {

	63 PPC_POWER5,

	64 PPC_POWER6,

	65 PPC_POWER7,

	66 PPC_POWER8,

	67 PPC_G4,

	68 PPC_G5,

	69 PPC_PA6T

	70 };

	71

58 // General features	72 // General features

59 bool has_fpu() const { return has_fpu_; }	73 bool has_fpu() const { return has_fpu_; }

60	74

61 // x86 features	75 // x86 features

62 bool has_cmov() const { return has_cmov_; }	76 bool has_cmov() const { return has_cmov_; }

63 bool has_sahf() const { return has_sahf_; }	77 bool has_sahf() const { return has_sahf_; }

64 bool has_mmx() const { return has_mmx_; }	78 bool has_mmx() const { return has_mmx_; }

65 bool has_sse() const { return has_sse_; }	79 bool has_sse() const { return has_sse_; }

66 bool has_sse2() const { return has_sse2_; }	80 bool has_sse2() const { return has_sse2_; }

67 bool has_sse3() const { return has_sse3_; }	81 bool has_sse3() const { return has_sse3_; }

(...skipping 18 matching lines...) Expand all Loading...
86 char vendor_[13];	100 char vendor_[13];

87 int stepping_;	101 int stepping_;

88 int model_;	102 int model_;

89 int ext_model_;	103 int ext_model_;

90 int family_;	104 int family_;

91 int ext_family_;	105 int ext_family_;

92 int type_;	106 int type_;

93 int implementer_;	107 int implementer_;

94 int architecture_;	108 int architecture_;

95 int part_;	109 int part_;

	110 int cache_line_size_;

96 bool has_fpu_;	111 bool has_fpu_;

97 bool has_cmov_;	112 bool has_cmov_;

98 bool has_sahf_;	113 bool has_sahf_;

99 bool has_mmx_;	114 bool has_mmx_;

100 bool has_sse_;	115 bool has_sse_;

101 bool has_sse2_;	116 bool has_sse2_;

102 bool has_sse3_;	117 bool has_sse3_;

103 bool has_ssse3_;	118 bool has_ssse3_;

104 bool has_sse41_;	119 bool has_sse41_;

105 bool has_sse42_;	120 bool has_sse42_;

106 bool has_avx_;	121 bool has_avx_;

107 bool has_fma3_;	122 bool has_fma3_;

108 bool has_idiva_;	123 bool has_idiva_;

109 bool has_neon_;	124 bool has_neon_;

110 bool has_thumb2_;	125 bool has_thumb2_;

111 bool has_vfp_;	126 bool has_vfp_;

112 bool has_vfp3_;	127 bool has_vfp3_;

113 bool has_vfp3_d32_;	128 bool has_vfp3_d32_;

114 bool is_fp64_mode_;	129 bool is_fp64_mode_;

115 };	130 };

116	131

117 } } // namespace v8::base	132 } } // namespace v8::base

118	133

119 #endif // V8_BASE_CPU_H_	134 #endif // V8_BASE_CPU_H_

OLD	NEW

« src/bailout-reason.h ('K') | « src/base/build_config.h ('k') | src/base/cpu.cc » ('j') | src/base/platform/platform-posix.cc » ('J')