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Issue 810763002: ARM: check immediate overflow in branch and mov_label_offset in release mode to catch crashes earli… (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 6 years ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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1331 // be emitted at the pc offset recorded by the label. 1331 // be emitted at the pc offset recorded by the label.
1332 BlockConstPoolFor(1); 1332 BlockConstPoolFor(1);
1333 return target_pos - (pc_offset() + kPcLoadDelta); 1333 return target_pos - (pc_offset() + kPcLoadDelta);
1334 } 1334 }
1335 1335
1336 1336
1337 // Branch instructions. 1337 // Branch instructions.
1338 void Assembler::b(int branch_offset, Condition cond) { 1338 void Assembler::b(int branch_offset, Condition cond) {
1339 DCHECK((branch_offset & 3) == 0); 1339 DCHECK((branch_offset & 3) == 0);
1340 int imm24 = branch_offset >> 2; 1340 int imm24 = branch_offset >> 2;
1341 DCHECK(is_int24(imm24)); 1341 CHECK(is_int24(imm24));
1342 emit(cond | B27 | B25 | (imm24 & kImm24Mask)); 1342 emit(cond | B27 | B25 | (imm24 & kImm24Mask));
1343 1343
1344 if (cond == al) { 1344 if (cond == al) {
1345 // Dead code is a good location to emit the constant pool. 1345 // Dead code is a good location to emit the constant pool.
1346 CheckConstPool(false, false); 1346 CheckConstPool(false, false);
1347 } 1347 }
1348 } 1348 }
1349 1349
1350 1350
1351 void Assembler::bl(int branch_offset, Condition cond) { 1351 void Assembler::bl(int branch_offset, Condition cond) {
1352 positions_recorder()->WriteRecordedPositions(); 1352 positions_recorder()->WriteRecordedPositions();
1353 DCHECK((branch_offset & 3) == 0); 1353 DCHECK((branch_offset & 3) == 0);
1354 int imm24 = branch_offset >> 2; 1354 int imm24 = branch_offset >> 2;
1355 DCHECK(is_int24(imm24)); 1355 CHECK(is_int24(imm24));
1356 emit(cond | B27 | B25 | B24 | (imm24 & kImm24Mask)); 1356 emit(cond | B27 | B25 | B24 | (imm24 & kImm24Mask));
1357 } 1357 }
1358 1358
1359 1359
1360 void Assembler::blx(int branch_offset) { // v5 and above 1360 void Assembler::blx(int branch_offset) { // v5 and above
1361 positions_recorder()->WriteRecordedPositions(); 1361 positions_recorder()->WriteRecordedPositions();
1362 DCHECK((branch_offset & 1) == 0); 1362 DCHECK((branch_offset & 1) == 0);
1363 int h = ((branch_offset & 2) >> 1)*B24; 1363 int h = ((branch_offset & 2) >> 1)*B24;
1364 int imm24 = branch_offset >> 2; 1364 int imm24 = branch_offset >> 2;
1365 DCHECK(is_int24(imm24)); 1365 CHECK(is_int24(imm24));
1366 emit(kSpecialCondition | B27 | B25 | h | (imm24 & kImm24Mask)); 1366 emit(kSpecialCondition | B27 | B25 | h | (imm24 & kImm24Mask));
1367 } 1367 }
1368 1368
1369 1369
1370 void Assembler::blx(Register target, Condition cond) { // v5 and above 1370 void Assembler::blx(Register target, Condition cond) { // v5 and above
1371 positions_recorder()->WriteRecordedPositions(); 1371 positions_recorder()->WriteRecordedPositions();
1372 DCHECK(!target.is(pc)); 1372 DCHECK(!target.is(pc));
1373 emit(cond | B24 | B21 | 15*B16 | 15*B12 | 15*B8 | BLX | target.code()); 1373 emit(cond | B24 | B21 | 15*B16 | 15*B12 | 15*B8 | BLX | target.code());
1374 } 1374 }
1375 1375
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1497 // For ARMv7: 1497 // For ARMv7:
1498 // link 1498 // link
1499 // mov dst, dst 1499 // mov dst, dst
1500 // For ARMv6: 1500 // For ARMv6:
1501 // link 1501 // link
1502 // mov dst, dst 1502 // mov dst, dst
1503 // mov dst, dst 1503 // mov dst, dst
1504 // 1504 //
1505 // When the label gets bound: target_at extracts the link and target_at_put 1505 // When the label gets bound: target_at extracts the link and target_at_put
1506 // patches the instructions. 1506 // patches the instructions.
1507 DCHECK(is_uint24(link)); 1507 CHECK(is_uint24(link));
1508 BlockConstPoolScope block_const_pool(this); 1508 BlockConstPoolScope block_const_pool(this);
1509 emit(link); 1509 emit(link);
1510 nop(dst.code()); 1510 nop(dst.code());
1511 if (!CpuFeatures::IsSupported(ARMv7)) { 1511 if (!CpuFeatures::IsSupported(ARMv7)) {
1512 nop(dst.code()); 1512 nop(dst.code());
1513 } 1513 }
1514 } 1514 }
1515 } 1515 }
1516 1516
1517 1517
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3971 assm->instr_at_put( 3971 assm->instr_at_put(
3972 rinfo.pc(), Assembler::SetLdrRegisterImmediateOffset(instr, offset)); 3972 rinfo.pc(), Assembler::SetLdrRegisterImmediateOffset(instr, offset));
3973 } 3973 }
3974 } 3974 }
3975 } 3975 }
3976 3976
3977 3977
3978 } } // namespace v8::internal 3978 } } // namespace v8::internal
3979 3979
3980 #endif // V8_TARGET_ARCH_ARM 3980 #endif // V8_TARGET_ARCH_ARM
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