| Index: src/compiler/register-allocator.cc
|
| diff --git a/src/compiler/register-allocator.cc b/src/compiler/register-allocator.cc
|
| index 9eb4a470f298359c1ae5cbb14d9cf314bf13d737..219c71ec40dbde83fc13a580f7a4623782865a86 100644
|
| --- a/src/compiler/register-allocator.cc
|
| +++ b/src/compiler/register-allocator.cc
|
| @@ -575,8 +575,7 @@ RegisterAllocator::RegisterAllocator(const RegisterConfiguration* config,
|
| reusable_slots_(local_zone()),
|
| spill_ranges_(local_zone()),
|
| mode_(UNALLOCATED_REGISTERS),
|
| - num_registers_(-1),
|
| - allocation_ok_(true) {
|
| + num_registers_(-1) {
|
| DCHECK(this->config()->num_general_registers() <=
|
| RegisterConfiguration::kMaxGeneralRegisters);
|
| DCHECK(this->config()->num_double_registers() <=
|
| @@ -1024,7 +1023,6 @@ bool RegisterAllocator::TryReuseSpillForPhi(LiveRange* range) {
|
| auto spill_range = AssignSpillRangeToLiveRange(range->TopLevel());
|
| CHECK(first_op_spill->TryMerge(spill_range));
|
| SpillBetween(range, range->Start(), pos->pos());
|
| - if (!AllocationOk()) return false;
|
| DCHECK(UnhandledIsSorted());
|
| return true;
|
| }
|
| @@ -1043,7 +1041,6 @@ void RegisterAllocator::MeetRegisterConstraints(const InstructionBlock* block) {
|
| if (i < end) instr = InstructionAt(i + 1);
|
| if (i > start) prev_instr = InstructionAt(i - 1);
|
| MeetConstraintsBetween(prev_instr, instr, i);
|
| - if (!AllocationOk()) return;
|
| }
|
| }
|
|
|
| @@ -1932,7 +1929,6 @@ void RegisterAllocator::AllocateRegisters() {
|
| // Do not spill live range eagerly if use position that can benefit from
|
| // the register is too close to the start of live range.
|
| SpillBetween(current, current->Start(), pos->pos());
|
| - if (!AllocationOk()) return;
|
| DCHECK(UnhandledIsSorted());
|
| continue;
|
| }
|
| @@ -1942,7 +1938,6 @@ void RegisterAllocator::AllocateRegisters() {
|
| if (TryReuseSpillForPhi(current)) {
|
| continue;
|
| }
|
| - if (!AllocationOk()) return;
|
| }
|
|
|
| for (size_t i = 0; i < active_live_ranges().size(); ++i) {
|
| @@ -1970,11 +1965,7 @@ void RegisterAllocator::AllocateRegisters() {
|
| DCHECK(!current->HasRegisterAssigned() && !current->IsSpilled());
|
|
|
| bool result = TryAllocateFreeReg(current);
|
| - if (!AllocationOk()) return;
|
| -
|
| if (!result) AllocateBlockedReg(current);
|
| - if (!AllocationOk()) return;
|
| -
|
| if (current->HasRegisterAssigned()) {
|
| AddToActive(current);
|
| }
|
| @@ -2186,7 +2177,6 @@ bool RegisterAllocator::TryAllocateFreeReg(LiveRange* current) {
|
| // Register reg is available at the range start but becomes blocked before
|
| // the range end. Split current at position where it becomes blocked.
|
| auto tail = SplitRangeAt(current, pos);
|
| - if (!AllocationOk()) return false;
|
| AddToUnhandledSorted(tail);
|
| }
|
|
|
| @@ -2267,7 +2257,6 @@ void RegisterAllocator::AllocateBlockedReg(LiveRange* current) {
|
| // position.
|
| LiveRange* tail = SplitBetween(current, current->Start(),
|
| block_pos[reg].InstructionStart());
|
| - if (!AllocationOk()) return;
|
| AddToUnhandledSorted(tail);
|
| }
|
|
|
| @@ -2346,7 +2335,6 @@ void RegisterAllocator::SplitAndSpillIntersecting(LiveRange* current) {
|
| // current live-range is larger than their end.
|
| SpillBetweenUntil(range, spill_pos, current->Start(), next_pos->pos());
|
| }
|
| - if (!AllocationOk()) return;
|
| ActiveToHandled(range);
|
| --i;
|
| }
|
| @@ -2365,7 +2353,6 @@ void RegisterAllocator::SplitAndSpillIntersecting(LiveRange* current) {
|
| next_intersection = Min(next_intersection, next_pos->pos());
|
| SpillBetween(range, split_pos, next_intersection);
|
| }
|
| - if (!AllocationOk()) return;
|
| InactiveToHandled(range);
|
| --i;
|
| }
|
| @@ -2393,7 +2380,6 @@ LiveRange* RegisterAllocator::SplitRangeAt(LiveRange* range,
|
| !InstructionAt(pos.InstructionIndex())->IsControl());
|
|
|
| int vreg = GetVirtualRegister();
|
| - if (!AllocationOk()) return nullptr;
|
| auto result = LiveRangeFor(vreg);
|
| range->SplitAt(pos, result, local_zone());
|
| return result;
|
| @@ -2451,7 +2437,6 @@ LifetimePosition RegisterAllocator::FindOptimalSplitPos(LifetimePosition start,
|
|
|
| void RegisterAllocator::SpillAfter(LiveRange* range, LifetimePosition pos) {
|
| auto second_part = SplitRangeAt(range, pos);
|
| - if (!AllocationOk()) return;
|
| Spill(second_part);
|
| }
|
|
|
| @@ -2468,7 +2453,6 @@ void RegisterAllocator::SpillBetweenUntil(LiveRange* range,
|
| LifetimePosition end) {
|
| CHECK(start.Value() < end.Value());
|
| auto second_part = SplitRangeAt(range, start);
|
| - if (!AllocationOk()) return;
|
|
|
| if (second_part->Start().Value() < end.Value()) {
|
| // The split result intersects with [start, end[.
|
| @@ -2477,7 +2461,6 @@ void RegisterAllocator::SpillBetweenUntil(LiveRange* range,
|
| auto third_part = SplitBetween(
|
| second_part, Max(second_part->Start().InstructionEnd(), until),
|
| end.PrevInstruction().InstructionEnd());
|
| - if (!AllocationOk()) return;
|
|
|
| DCHECK(third_part != second_part);
|
|
|
|
|