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Side by Side Diff: src/compiler/instruction.h

Issue 810023002: [turbofan] remove control field from instruction (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 6 years ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_INSTRUCTION_H_ 5 #ifndef V8_COMPILER_INSTRUCTION_H_
6 #define V8_COMPILER_INSTRUCTION_H_ 6 #define V8_COMPILER_INSTRUCTION_H_
7 7
8 #include <deque> 8 #include <deque>
9 #include <iosfwd> 9 #include <iosfwd>
10 #include <map> 10 #include <map>
(...skipping 436 matching lines...) Expand 10 before | Expand all | Expand 10 after
447 InstructionCode opcode() const { return opcode_; } 447 InstructionCode opcode() const { return opcode_; }
448 ArchOpcode arch_opcode() const { return ArchOpcodeField::decode(opcode()); } 448 ArchOpcode arch_opcode() const { return ArchOpcodeField::decode(opcode()); }
449 AddressingMode addressing_mode() const { 449 AddressingMode addressing_mode() const {
450 return AddressingModeField::decode(opcode()); 450 return AddressingModeField::decode(opcode());
451 } 451 }
452 FlagsMode flags_mode() const { return FlagsModeField::decode(opcode()); } 452 FlagsMode flags_mode() const { return FlagsModeField::decode(opcode()); }
453 FlagsCondition flags_condition() const { 453 FlagsCondition flags_condition() const {
454 return FlagsConditionField::decode(opcode()); 454 return FlagsConditionField::decode(opcode());
455 } 455 }
456 456
457 // TODO(titzer): make control and call into flags. 457 // TODO(titzer): make call into a flag.
458 static Instruction* New(Zone* zone, InstructionCode opcode) { 458 static Instruction* New(Zone* zone, InstructionCode opcode) {
459 return New(zone, opcode, 0, NULL, 0, NULL, 0, NULL); 459 return New(zone, opcode, 0, NULL, 0, NULL, 0, NULL);
460 } 460 }
461 461
462 static Instruction* New(Zone* zone, InstructionCode opcode, 462 static Instruction* New(Zone* zone, InstructionCode opcode,
463 size_t output_count, InstructionOperand** outputs, 463 size_t output_count, InstructionOperand** outputs,
464 size_t input_count, InstructionOperand** inputs, 464 size_t input_count, InstructionOperand** inputs,
465 size_t temp_count, InstructionOperand** temps) { 465 size_t temp_count, InstructionOperand** temps) {
466 DCHECK(opcode >= 0); 466 DCHECK(opcode >= 0);
467 DCHECK(output_count == 0 || outputs != NULL); 467 DCHECK(output_count == 0 || outputs != NULL);
468 DCHECK(input_count == 0 || inputs != NULL); 468 DCHECK(input_count == 0 || inputs != NULL);
469 DCHECK(temp_count == 0 || temps != NULL); 469 DCHECK(temp_count == 0 || temps != NULL);
470 InstructionOperand* none = NULL; 470 InstructionOperand* none = NULL;
471 USE(none); 471 USE(none);
472 int size = static_cast<int>(RoundUp(sizeof(Instruction), kPointerSize) + 472 int size = static_cast<int>(RoundUp(sizeof(Instruction), kPointerSize) +
473 (output_count + input_count + temp_count - 1) * 473 (output_count + input_count + temp_count - 1) *
474 sizeof(none)); 474 sizeof(none));
475 return new (zone->New(size)) Instruction( 475 return new (zone->New(size)) Instruction(
476 opcode, output_count, outputs, input_count, inputs, temp_count, temps); 476 opcode, output_count, outputs, input_count, inputs, temp_count, temps);
477 } 477 }
478 478
479 // TODO(titzer): another holdover from lithium days; register allocator
480 // should not need to know about control instructions.
481 Instruction* MarkAsControl() {
482 bit_field_ = IsControlField::update(bit_field_, true);
483 return this;
484 }
485 Instruction* MarkAsCall() { 479 Instruction* MarkAsCall() {
486 bit_field_ = IsCallField::update(bit_field_, true); 480 bit_field_ = IsCallField::update(bit_field_, true);
487 return this; 481 return this;
488 } 482 }
489 bool IsControl() const { return IsControlField::decode(bit_field_); }
490 bool IsCall() const { return IsCallField::decode(bit_field_); } 483 bool IsCall() const { return IsCallField::decode(bit_field_); }
491 bool NeedsPointerMap() const { return IsCall(); } 484 bool NeedsPointerMap() const { return IsCall(); }
492 bool HasPointerMap() const { return pointer_map_ != NULL; } 485 bool HasPointerMap() const { return pointer_map_ != NULL; }
493 486
494 bool IsGapMoves() const { return opcode() == kGapInstruction; } 487 bool IsGapMoves() const { return opcode() == kGapInstruction; }
495 bool IsSourcePosition() const { 488 bool IsSourcePosition() const {
496 return opcode() == kSourcePositionInstruction; 489 return opcode() == kSourcePositionInstruction;
497 } 490 }
498 491
499 bool ClobbersRegisters() const { return IsCall(); } 492 bool ClobbersRegisters() const { return IsCall(); }
(...skipping 21 matching lines...) Expand all
521 514
522 bool IsNop() const { 515 bool IsNop() const {
523 return arch_opcode() == kArchNop && InputCount() == 0 && 516 return arch_opcode() == kArchNop && InputCount() == 0 &&
524 OutputCount() == 0 && TempCount() == 0; 517 OutputCount() == 0 && TempCount() == 0;
525 } 518 }
526 519
527 protected: 520 protected:
528 explicit Instruction(InstructionCode opcode) 521 explicit Instruction(InstructionCode opcode)
529 : opcode_(opcode), 522 : opcode_(opcode),
530 bit_field_(OutputCountField::encode(0) | InputCountField::encode(0) | 523 bit_field_(OutputCountField::encode(0) | InputCountField::encode(0) |
531 TempCountField::encode(0) | IsCallField::encode(false) | 524 TempCountField::encode(0) | IsCallField::encode(false)),
532 IsControlField::encode(false)),
533 pointer_map_(NULL) {} 525 pointer_map_(NULL) {}
534 526
535 Instruction(InstructionCode opcode, size_t output_count, 527 Instruction(InstructionCode opcode, size_t output_count,
536 InstructionOperand** outputs, size_t input_count, 528 InstructionOperand** outputs, size_t input_count,
537 InstructionOperand** inputs, size_t temp_count, 529 InstructionOperand** inputs, size_t temp_count,
538 InstructionOperand** temps) 530 InstructionOperand** temps)
539 : opcode_(opcode), 531 : opcode_(opcode),
540 bit_field_(OutputCountField::encode(output_count) | 532 bit_field_(OutputCountField::encode(output_count) |
541 InputCountField::encode(input_count) | 533 InputCountField::encode(input_count) |
542 TempCountField::encode(temp_count) | 534 TempCountField::encode(temp_count) |
543 IsCallField::encode(false) | IsControlField::encode(false)), 535 IsCallField::encode(false)),
544 pointer_map_(NULL) { 536 pointer_map_(NULL) {
545 for (size_t i = 0; i < output_count; ++i) { 537 for (size_t i = 0; i < output_count; ++i) {
546 operands_[i] = outputs[i]; 538 operands_[i] = outputs[i];
547 } 539 }
548 for (size_t i = 0; i < input_count; ++i) { 540 for (size_t i = 0; i < input_count; ++i) {
549 operands_[output_count + i] = inputs[i]; 541 operands_[output_count + i] = inputs[i];
550 } 542 }
551 for (size_t i = 0; i < temp_count; ++i) { 543 for (size_t i = 0; i < temp_count; ++i) {
552 operands_[output_count + input_count + i] = temps[i]; 544 operands_[output_count + input_count + i] = temps[i];
553 } 545 }
554 } 546 }
555 547
556 protected: 548 protected:
557 typedef BitField<size_t, 0, 8> OutputCountField; 549 typedef BitField<size_t, 0, 8> OutputCountField;
558 typedef BitField<size_t, 8, 16> InputCountField; 550 typedef BitField<size_t, 8, 16> InputCountField;
559 typedef BitField<size_t, 24, 6> TempCountField; 551 typedef BitField<size_t, 24, 6> TempCountField;
560 typedef BitField<bool, 30, 1> IsCallField; 552 typedef BitField<bool, 30, 1> IsCallField;
561 typedef BitField<bool, 31, 1> IsControlField;
562 553
563 InstructionCode opcode_; 554 InstructionCode opcode_;
564 uint32_t bit_field_; 555 uint32_t bit_field_;
565 PointerMap* pointer_map_; 556 PointerMap* pointer_map_;
566 InstructionOperand* operands_[1]; 557 InstructionOperand* operands_[1];
567 }; 558 };
568 559
569 560
570 struct PrintableInstruction { 561 struct PrintableInstruction {
571 const RegisterConfiguration* register_configuration_; 562 const RegisterConfiguration* register_configuration_;
(...skipping 485 matching lines...) Expand 10 before | Expand all | Expand 10 after
1057 1048
1058 1049
1059 std::ostream& operator<<(std::ostream& os, 1050 std::ostream& operator<<(std::ostream& os,
1060 const PrintableInstructionSequence& code); 1051 const PrintableInstructionSequence& code);
1061 1052
1062 } // namespace compiler 1053 } // namespace compiler
1063 } // namespace internal 1054 } // namespace internal
1064 } // namespace v8 1055 } // namespace v8
1065 1056
1066 #endif // V8_COMPILER_INSTRUCTION_H_ 1057 #endif // V8_COMPILER_INSTRUCTION_H_
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