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| 1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #include "src/v8.h" | 5 #include "src/v8.h" |
| 6 | 6 |
| 7 #if V8_TARGET_ARCH_X64 | 7 #if V8_TARGET_ARCH_X64 |
| 8 | 8 |
| 9 #include "src/base/bits.h" | 9 #include "src/base/bits.h" |
| 10 #include "src/macro-assembler.h" | 10 #include "src/macro-assembler.h" |
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| 23 | 23 |
| 24 // Only use statically determined features for cross compile (snapshot). | 24 // Only use statically determined features for cross compile (snapshot). |
| 25 if (cross_compile) return; | 25 if (cross_compile) return; |
| 26 | 26 |
| 27 if (cpu.has_sse41() && FLAG_enable_sse4_1) supported_ |= 1u << SSE4_1; | 27 if (cpu.has_sse41() && FLAG_enable_sse4_1) supported_ |= 1u << SSE4_1; |
| 28 if (cpu.has_sse3() && FLAG_enable_sse3) supported_ |= 1u << SSE3; | 28 if (cpu.has_sse3() && FLAG_enable_sse3) supported_ |= 1u << SSE3; |
| 29 // SAHF is not generally available in long mode. | 29 // SAHF is not generally available in long mode. |
| 30 if (cpu.has_sahf() && FLAG_enable_sahf) supported_ |= 1u << SAHF; | 30 if (cpu.has_sahf() && FLAG_enable_sahf) supported_ |= 1u << SAHF; |
| 31 if (cpu.has_avx() && FLAG_enable_avx) supported_ |= 1u << AVX; | 31 if (cpu.has_avx() && FLAG_enable_avx) supported_ |= 1u << AVX; |
| 32 if (cpu.has_fma3() && FLAG_enable_fma3) supported_ |= 1u << FMA3; | 32 if (cpu.has_fma3() && FLAG_enable_fma3) supported_ |= 1u << FMA3; |
| 33 if (cpu.is_atom() && FLAG_enable_atom) supported_ |= 1u << ATOM; |
| 33 } | 34 } |
| 34 | 35 |
| 35 | 36 |
| 36 void CpuFeatures::PrintTarget() { } | 37 void CpuFeatures::PrintTarget() { } |
| 37 void CpuFeatures::PrintFeatures() { | 38 void CpuFeatures::PrintFeatures() { |
| 38 printf("SSE3=%d SSE4_1=%d SAHF=%d AVX=%d FMA3=%d\n", | 39 printf("SSE3=%d SSE4_1=%d SAHF=%d AVX=%d FMA3=%d ATOM=%d\n", |
| 39 CpuFeatures::IsSupported(SSE3), CpuFeatures::IsSupported(SSE4_1), | 40 CpuFeatures::IsSupported(SSE3), CpuFeatures::IsSupported(SSE4_1), |
| 40 CpuFeatures::IsSupported(SAHF), CpuFeatures::IsSupported(AVX), | 41 CpuFeatures::IsSupported(SAHF), CpuFeatures::IsSupported(AVX), |
| 41 CpuFeatures::IsSupported(FMA3)); | 42 CpuFeatures::IsSupported(FMA3), CpuFeatures::IsSupported(ATOM)); |
| 42 } | 43 } |
| 43 | 44 |
| 44 | 45 |
| 45 // ----------------------------------------------------------------------------- | 46 // ----------------------------------------------------------------------------- |
| 46 // Implementation of RelocInfo | 47 // Implementation of RelocInfo |
| 47 | 48 |
| 48 // Patch the code at the current PC with a call to the target address. | 49 // Patch the code at the current PC with a call to the target address. |
| 49 // Additional guard int3 instructions can be added if required. | 50 // Additional guard int3 instructions can be added if required. |
| 50 void RelocInfo::PatchCodeWithCall(Address target, int guard_bytes) { | 51 void RelocInfo::PatchCodeWithCall(Address target, int guard_bytes) { |
| 51 int code_size = Assembler::kCallSequenceLength + guard_bytes; | 52 int code_size = Assembler::kCallSequenceLength + guard_bytes; |
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| 3350 | 3351 |
| 3351 | 3352 |
| 3352 bool RelocInfo::IsInConstantPool() { | 3353 bool RelocInfo::IsInConstantPool() { |
| 3353 return false; | 3354 return false; |
| 3354 } | 3355 } |
| 3355 | 3356 |
| 3356 | 3357 |
| 3357 } } // namespace v8::internal | 3358 } } // namespace v8::internal |
| 3358 | 3359 |
| 3359 #endif // V8_TARGET_ARCH_X64 | 3360 #endif // V8_TARGET_ARCH_X64 |
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