Subzero: Randomize register assignment.

src/IceTargetLowering.cpp

 //===- subzero/src/IceTargetLowering.cpp - Basic lowering implementation --===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the skeleton of the TargetLowering class,
@@ skipping 11 matching lines @@
 #include "IceCfgNode.h"
 #include "IceOperand.h"
 #include "IceRegAlloc.h"
 #include "IceTargetLowering.h"
 #include "IceTargetLoweringX8632.h"
 
 namespace Ice {
 
 namespace {
 
+// TODO(stichnot): Move this machinery into llvm2ice.cpp.
 namespace cl = llvm::cl;
 cl::opt<bool> DoNopInsertion("nop-insertion", cl::desc("Randomly insert NOPs"),
                              cl::init(false));
 
 cl::opt<int> MaxNopsPerInstruction(
     "max-nops-per-instruction",
     cl::desc("Max number of nops to insert per instruction"), cl::init(1));
 
 cl::opt<int> NopProbabilityAsPercentage(
     "nop-insertion-percentage",
     cl::desc("Nop insertion probability as percentage"), cl::init(10));
+
+cl::opt<bool>
+CLRandomizeRegisterAllocation("randomize-regalloc",
+                              cl::desc("Randomize register allocation"),
+                              cl::init(false));
 } // end of anonymous namespace
 
 void LoweringContext::init(CfgNode *N) {
   Node = N;
   End = getNode()->getInsts().end();
   rewind();
   advanceForward(Next);
 }
 
 void LoweringContext::rewind() {
@@ skipping 35 matching lines @@
     return IceTargetX8664::create(Func);
   if (Target == Target_ARM32)
     return IceTargetARM32::create(Func);
   if (Target == Target_ARM64)
     return IceTargetARM64::create(Func);
 #endif
   Func->setError("Unsupported target");
   return NULL;
 }
 
+TargetLowering::TargetLowering(Cfg *Func)
+    : Func(Func), Ctx(Func->getContext()),
+      RandomizeRegisterAllocation(CLRandomizeRegisterAllocation),
+      HasComputedFrame(false), CallsReturnsTwice(false), StackAdjustment(0),
+      Context() {}
+
 Assembler *TargetLowering::createAssembler(TargetArch Target, Cfg *Func) {
   // These statements can be #ifdef'd to specialize the assembler
   // to a subset of the available targets.  TODO: use CRTP.
   if (Target == Target_X8632)
     return new x86::AssemblerX86();
   Func->setError("Unsupported target");
   return NULL;
 }
 
 void TargetLowering::doAddressOpt() {
@@ skipping 121 matching lines @@
   TimerMarker T(TimerStack::TT_regAlloc, Func);
   LinearScan LinearScan(Func);
   RegSetMask RegInclude = RegSet_None;
   RegSetMask RegExclude = RegSet_None;
   RegInclude |= RegSet_CallerSave;
   RegInclude |= RegSet_CalleeSave;
   if (hasFramePointer())
     RegExclude |= RegSet_FramePointer;
   LinearScan.init(Kind);
   llvm::SmallBitVector RegMask = getRegisterSet(RegInclude, RegExclude);
-  LinearScan.scan(RegMask);
+  LinearScan.scan(RegMask, RandomizeRegisterAllocation);
 }
 
 TargetGlobalInitLowering *
 TargetGlobalInitLowering::createLowering(TargetArch Target,
                                          GlobalContext *Ctx) {
   // These statements can be #ifdef'd to specialize the code generator
   // to a subset of the available targets.  TODO: use CRTP.
   if (Target == Target_X8632)
     return TargetGlobalInitX8632::create(Ctx);
 #if 0
   if (Target == Target_X8664)
     return IceTargetGlobalInitX8664::create(Ctx);
   if (Target == Target_ARM32)
     return IceTargetGlobalInitARM32::create(Ctx);
   if (Target == Target_ARM64)
     return IceTargetGlobalInitARM64::create(Ctx);
 #endif
   llvm_unreachable("Unsupported target");
   return NULL;
 }
 
 TargetGlobalInitLowering::~TargetGlobalInitLowering() {}
 
 } // end of namespace Ice