[turbofan] move assembly order to InstructionBlock

src/compiler/instruction.h

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef V8_COMPILER_INSTRUCTION_H_
 #define V8_COMPILER_INSTRUCTION_H_
 
 #include <deque>
 #include <iosfwd>
 #include <map>
@@ skipping 798 matching lines @@
   IntVector operands_;
   InstructionOperand* output_;
   Inputs inputs_;
 };
 
 
 // Analogue of BasicBlock for Instructions instead of Nodes.
 class InstructionBlock FINAL : public ZoneObject {
  public:
   InstructionBlock(Zone* zone, BasicBlock::Id id,
-                   BasicBlock::RpoNumber ao_number,
                    BasicBlock::RpoNumber rpo_number,
                    BasicBlock::RpoNumber loop_header,
                    BasicBlock::RpoNumber loop_end, bool deferred);
 
   // Instruction indexes (used by the register allocator).
   int first_instruction_index() const {
     DCHECK(code_start_ >= 0);
     DCHECK(code_end_ > 0);
     DCHECK(code_end_ >= code_start_);
     return code_start_;
@@ skipping 68 matching lines @@
 struct PrintableInstructionSequence;
 
 
 // Represents architecture-specific generated code before, during, and after
 // register allocation.
 // TODO(titzer): s/IsDouble/IsFloat64/
 class InstructionSequence FINAL : public ZoneObject {
  public:
   static InstructionBlocks* InstructionBlocksFor(Zone* zone,
                                                  const Schedule* schedule);
+  // Puts the deferred blocks last.
+  static void ComputeAssemblyOrder(InstructionBlocks* blocks);
 
   InstructionSequence(Zone* zone, InstructionBlocks* instruction_blocks);
 
   int NextVirtualRegister() { return next_virtual_register_++; }
   int VirtualRegisterCount() const { return next_virtual_register_; }
 
   const InstructionBlocks& instruction_blocks() const {
     return *instruction_blocks_;
   }
 
@@ skipping 130 matching lines @@
 
 
 std::ostream& operator<<(std::ostream& os,
                          const PrintableInstructionSequence& code);
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_COMPILER_INSTRUCTION_H_