Fix SLTIU instruction in MIPS assembler, disassembler, and simulator.

runtime/vm/assembler_mips.h

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #ifndef VM_ASSEMBLER_MIPS_H_
 #define VM_ASSEMBLER_MIPS_H_
 
 #ifndef VM_ASSEMBLER_H_
 #error Do not include assembler_mips.h directly; use assembler.h instead.
 #endif
@@ skipping 543 matching lines @@
   void lh(Register rt, const Address& addr) {
     EmitLoadStore(LH, rt, addr);
   }
 
   void lhu(Register rt, const Address& addr) {
     EmitLoadStore(LHU, rt, addr);
   }
 
   void lui(Register rt, const Immediate& imm) {
     ASSERT(Utils::IsUint(kImmBits, imm.value()));
-    uint16_t imm_value = static_cast<uint16_t>(imm.value());
+    const uint16_t imm_value = static_cast<uint16_t>(imm.value());
     EmitIType(LUI, R0, rt, imm_value);
   }
 
   void lw(Register rt, const Address& addr) {
     EmitLoadStore(LW, rt, addr);
   }
 
   void lwc1(FRegister ft, const Address& addr) {
     EmitFpuLoadStore(LWC1, ft, addr);
   }
@@ skipping 91 matching lines @@
   void nor(Register rd, Register rs, Register rt) {
     EmitRType(SPECIAL, rs, rt, rd, 0, NOR);
   }
 
   void or_(Register rd, Register rs, Register rt) {
     EmitRType(SPECIAL, rs, rt, rd, 0, OR);
   }
 
   void ori(Register rt, Register rs, const Immediate& imm) {
     ASSERT(Utils::IsUint(kImmBits, imm.value()));
-    uint16_t imm_value = static_cast<uint16_t>(imm.value());
+    const uint16_t imm_value = static_cast<uint16_t>(imm.value());
     EmitIType(ORI, rs, rt, imm_value);
   }
 
   void sb(Register rt, const Address& addr) {
     EmitLoadStore(SB, rt, addr);
   }
 
   void sdc1(DRegister dt, const Address& addr) {
     FRegister ft = static_cast<FRegister>(dt * 2);
     EmitFpuLoadStore(SDC1, ft, addr);
@@ skipping 10 matching lines @@
   void sllv(Register rd, Register rt, Register rs) {
     EmitRType(SPECIAL, rs, rt, rd, 0, SLLV);
   }
 
   void slt(Register rd, Register rs, Register rt) {
     EmitRType(SPECIAL, rs, rt, rd, 0, SLT);
   }
 
   void slti(Register rt, Register rs, const Immediate& imm) {
     ASSERT(Utils::IsInt(kImmBits, imm.value()));
-    int16_t imm_value = static_cast<int16_t>(imm.value());
+    const uint16_t imm_value = static_cast<uint16_t>(imm.value());
     EmitIType(SLTI, rs, rt, imm_value);
   }
 
+  // Although imm argument is int32_t, it is interpreted as an uint32_t.
+  // For example, -1 stands for 0xffffffffUL: it is encoded as 0xffff in the
+  // instruction imm field and is then sign extended back to 0xffffffffUL.
   void sltiu(Register rt, Register rs, const Immediate& imm) {

[zra, 2014/12/13 03:12:59]

This is a weird instruction.

-    ASSERT(Utils::IsUint(kImmBits, imm.value()));
-    uint16_t imm_value = static_cast<uint16_t>(imm.value());
+    ASSERT(Utils::IsInt(kImmBits, imm.value()));
+    const uint16_t imm_value = static_cast<uint16_t>(imm.value());
     EmitIType(SLTIU, rs, rt, imm_value);
   }
 
   void sltu(Register rd, Register rs, Register rt) {
     EmitRType(SPECIAL, rs, rt, rd, 0, SLTU);
   }
 
   void sqrtd(DRegister dd, DRegister ds) {
     FRegister fd = static_cast<FRegister>(dd * 2);
     FRegister fs = static_cast<FRegister>(ds * 2);
@@ skipping 351 matching lines @@
   }
 
   void BranchUnsignedLess(Register rd, Register rs, Label* l) {
     ASSERT(!in_delay_slot_);
     BranchUnsignedGreater(rs, rd, l);
   }
 
   void BranchUnsignedLess(Register rd, const Immediate& imm, Label* l) {
     ASSERT(!in_delay_slot_);
     ASSERT(imm.value() != 0);
-    if (Utils::IsUint(kImmBits, imm.value())) {
+    if (Utils::IsInt(kImmBits, imm.value())) {
       sltiu(CMPRES2, rd, imm);
       bne(CMPRES2, ZR, l);
     } else {
       ASSERT(rd != CMPRES2);
       LoadImmediate(CMPRES2, imm.value());
       BranchUnsignedGreater(CMPRES2, rd, l);
     }
   }
 
   void BranchSignedLessEqual(Register rd, Register rs, Label* l) {
@@ skipping 317 matching lines @@
                                   Register value,
                                   Label* no_update);
 
   DISALLOW_ALLOCATION();
   DISALLOW_COPY_AND_ASSIGN(Assembler);
 };
 
 }  // namespace dart
 
 #endif  // VM_ASSEMBLER_MIPS_H_