Pass condition result explicitly. Do not imply the existence of a status

runtime/vm/flow_graph_compiler_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_MIPS.
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/flow_graph_compiler.h"
 
 #include "vm/ast_printer.h"
@@ skipping 1371 matching lines @@
   GenerateDartCall(deopt_id,
                    token_pos,
                    &stub_code->CallStaticFunctionLabel(),
                    RawPcDescriptors::kOptStaticCall,
                    locs);
   AddStaticCallTarget(function);
   __ Drop(argument_count);
 }
 
 
-void FlowGraphCompiler::EmitEqualityRegConstCompare(Register reg,
-                                                    const Object& obj,
-                                                    bool needs_number_check,
-                                                    intptr_t token_pos) {
+Condition FlowGraphCompiler::EmitEqualityRegConstCompare(
+    Register reg,
+    const Object& obj,
+    bool needs_number_check,
+    intptr_t token_pos) {
   __ TraceSimMsg("EqualityRegConstCompare");
   if (needs_number_check) {
     StubCode* stub_code = isolate()->stub_code();
     ASSERT(!obj.IsMint() && !obj.IsDouble() && !obj.IsBigint());
     __ addiu(SP, SP, Immediate(-2 * kWordSize));
     __ sw(reg, Address(SP, 1 * kWordSize));
     __ LoadObject(TMP, obj);
     __ sw(TMP, Address(SP, 0 * kWordSize));
     if (is_optimizing()) {
       __ BranchLinkPatchable(
           &stub_code->OptimizedIdenticalWithNumberCheckLabel());
     } else {
       __ BranchLinkPatchable(
           &stub_code->UnoptimizedIdenticalWithNumberCheckLabel());
     }
     if (token_pos != Scanner::kNoSourcePos) {
       AddCurrentDescriptor(RawPcDescriptors::kRuntimeCall,
                            Isolate::kNoDeoptId,
                            token_pos);
     }
     __ TraceSimMsg("EqualityRegConstCompare return");
+    // Stub returns result in CMPRES1 (if it is 0, then reg and obj are
+    // equal) and always sets CMPRES2 to 0.
     __ lw(reg, Address(SP, 1 * kWordSize));  // Restore 'reg'.
     __ addiu(SP, SP, Immediate(2 * kWordSize));  // Discard constant.
-    return;
+  } else {
+    __ CompareObject(CMPRES1, CMPRES2, reg, obj);
   }
-  __ CompareObject(CMPRES1, CMPRES2, reg, obj);
+  return EQ;
 }
 
 
-void FlowGraphCompiler::EmitEqualityRegRegCompare(Register left,
-                                                  Register right,
-                                                  bool needs_number_check,
-                                                  intptr_t token_pos) {
+Condition FlowGraphCompiler::EmitEqualityRegRegCompare(Register left,
+                                                       Register right,
+                                                       bool needs_number_check,
+                                                       intptr_t token_pos) {
   __ TraceSimMsg("EqualityRegRegCompare");
   __ Comment("EqualityRegRegCompare");
   if (needs_number_check) {
     StubCode* stub_code = isolate()->stub_code();
     __ addiu(SP, SP, Immediate(-2 * kWordSize));
     __ sw(left, Address(SP, 1 * kWordSize));
     __ sw(right, Address(SP, 0 * kWordSize));
     if (is_optimizing()) {
       __ BranchLinkPatchable(
           &stub_code->OptimizedIdenticalWithNumberCheckLabel());
     } else {
       __ BranchLinkPatchable(
           &stub_code->UnoptimizedIdenticalWithNumberCheckLabel());
     }
     if (token_pos != Scanner::kNoSourcePos) {
       AddCurrentDescriptor(RawPcDescriptors::kRuntimeCall,
                            Isolate::kNoDeoptId,
                            token_pos);
     }
 #if defined(DEBUG)
     if (!is_optimizing()) {
       // Do this *after* adding the pc descriptor!
       __ LoadImmediate(S4, kInvalidObjectPointer);
       __ LoadImmediate(S5, kInvalidObjectPointer);
     }
 #endif
     __ TraceSimMsg("EqualityRegRegCompare return");
-    // Stub returns result in CMPRES1. If it is 0, then left and right are
-    // equal.
+    // Stub returns result in CMPRES1 (if it is 0, then left and right are
+    // equal) and always sets CMPRES2 to 0.
     __ lw(right, Address(SP, 0 * kWordSize));
     __ lw(left, Address(SP, 1 * kWordSize));
     __ addiu(SP, SP, Immediate(2 * kWordSize));
   } else {
     __ slt(CMPRES1, left, right);
     __ slt(CMPRES2, right, left);
   }
+  return EQ;
 }
 
 
 // This function must be in sync with FlowGraphCompiler::RecordSafepoint and
 // FlowGraphCompiler::SlowPathEnvironmentFor.
 void FlowGraphCompiler::SaveLiveRegisters(LocationSummary* locs) {
 #if defined(DEBUG)
   locs->CheckWritableInputs();
   ClobberDeadTempRegisters(locs);
 #endif
 
   __ TraceSimMsg("SaveLiveRegisters");
   // TODO(vegorov): consider saving only caller save (volatile) registers.
-  const intptr_t fpu_regs_count= locs->live_registers()->FpuRegisterCount();
+  const intptr_t fpu_regs_count = locs->live_registers()->FpuRegisterCount();
   if (fpu_regs_count > 0) {
     __ AddImmediate(SP, -(fpu_regs_count * kFpuRegisterSize));
     // Store fpu registers with the lowest register number at the lowest
     // address.
     intptr_t offset = 0;
     for (intptr_t reg_idx = 0; reg_idx < kNumberOfFpuRegisters; ++reg_idx) {
       DRegister fpu_reg = static_cast<DRegister>(reg_idx);
       if (locs->live_registers()->ContainsFpuRegister(fpu_reg)) {
         __ StoreDToOffset(fpu_reg, SP, offset);
         offset += kFpuRegisterSize;
@@ skipping 367 matching lines @@
   __ AddImmediate(SP, kDoubleSize);
 }
 
 
 #undef __
 
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS