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Side by Side Diff: src/compiler/mips/instruction-selector-mips.cc

Issue 791473003: MIPS: Enable Math rounding operations call reduction optimization in TF. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Addressed comments. Created 5 years, 12 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/base/bits.h" 5 #include "src/base/bits.h"
6 #include "src/compiler/instruction-selector-impl.h" 6 #include "src/compiler/instruction-selector-impl.h"
7 #include "src/compiler/node-matchers.h" 7 #include "src/compiler/node-matchers.h"
8 8
9 namespace v8 { 9 namespace v8 {
10 namespace internal { 10 namespace internal {
(...skipping 51 matching lines...) Expand 10 before | Expand all | Expand 10 after
62 62
63 static void VisitRRR(InstructionSelector* selector, ArchOpcode opcode, 63 static void VisitRRR(InstructionSelector* selector, ArchOpcode opcode,
64 Node* node) { 64 Node* node) {
65 MipsOperandGenerator g(selector); 65 MipsOperandGenerator g(selector);
66 selector->Emit(opcode, g.DefineAsRegister(node), 66 selector->Emit(opcode, g.DefineAsRegister(node),
67 g.UseRegister(node->InputAt(0)), 67 g.UseRegister(node->InputAt(0)),
68 g.UseRegister(node->InputAt(1))); 68 g.UseRegister(node->InputAt(1)));
69 } 69 }
70 70
71 71
72 static void VisitRR(InstructionSelector* selector, ArchOpcode opcode,
73 Node* node) {
74 MipsOperandGenerator g(selector);
75 selector->Emit(opcode, g.DefineAsRegister(node),
76 g.UseRegister(node->InputAt(0)));
77 }
78
79
72 static void VisitRRO(InstructionSelector* selector, ArchOpcode opcode, 80 static void VisitRRO(InstructionSelector* selector, ArchOpcode opcode,
73 Node* node) { 81 Node* node) {
74 MipsOperandGenerator g(selector); 82 MipsOperandGenerator g(selector);
75 selector->Emit(opcode, g.DefineAsRegister(node), 83 selector->Emit(opcode, g.DefineAsRegister(node),
76 g.UseRegister(node->InputAt(0)), 84 g.UseRegister(node->InputAt(0)),
77 g.UseOperand(node->InputAt(1), opcode)); 85 g.UseOperand(node->InputAt(1), opcode));
78 } 86 }
79 87
80 88
81 static void VisitBinop(InstructionSelector* selector, Node* node, 89 static void VisitBinop(InstructionSelector* selector, Node* node,
(...skipping 331 matching lines...) Expand 10 before | Expand all | Expand 10 after
413 g.UseFixed(node->InputAt(1), f14))->MarkAsCall(); 421 g.UseFixed(node->InputAt(1), f14))->MarkAsCall();
414 } 422 }
415 423
416 424
417 void InstructionSelector::VisitFloat64Sqrt(Node* node) { 425 void InstructionSelector::VisitFloat64Sqrt(Node* node) {
418 MipsOperandGenerator g(this); 426 MipsOperandGenerator g(this);
419 Emit(kMipsSqrtD, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0))); 427 Emit(kMipsSqrtD, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)));
420 } 428 }
421 429
422 430
423 void InstructionSelector::VisitFloat64Floor(Node* node) { UNREACHABLE(); } 431 void InstructionSelector::VisitFloat64Floor(Node* node) {
432 VisitRR(this, kMipsFloat64Floor, node);
433 }
424 434
425 435
426 void InstructionSelector::VisitFloat64Ceil(Node* node) { UNREACHABLE(); } 436 void InstructionSelector::VisitFloat64Ceil(Node* node) {
437 VisitRR(this, kMipsFloat64Ceil, node);
438 }
427 439
428 440
429 void InstructionSelector::VisitFloat64RoundTruncate(Node* node) { 441 void InstructionSelector::VisitFloat64RoundTruncate(Node* node) {
430 UNREACHABLE(); 442 VisitRR(this, kMipsFloat64RoundTruncate, node);
431 } 443 }
432 444
433 445
434 void InstructionSelector::VisitFloat64RoundTiesAway(Node* node) { 446 void InstructionSelector::VisitFloat64RoundTiesAway(Node* node) {
435 UNREACHABLE(); 447 UNREACHABLE();
436 } 448 }
437 449
438 450
439 void InstructionSelector::VisitCall(Node* node) { 451 void InstructionSelector::VisitCall(Node* node) {
440 MipsOperandGenerator g(this); 452 MipsOperandGenerator g(this);
(...skipping 358 matching lines...) Expand 10 before | Expand all | Expand 10 after
799 811
800 void InstructionSelector::VisitFloat64LessThanOrEqual(Node* node) { 812 void InstructionSelector::VisitFloat64LessThanOrEqual(Node* node) {
801 FlagsContinuation cont(kUnorderedLessThanOrEqual, node); 813 FlagsContinuation cont(kUnorderedLessThanOrEqual, node);
802 VisitFloat64Compare(this, node, &cont); 814 VisitFloat64Compare(this, node, &cont);
803 } 815 }
804 816
805 817
806 // static 818 // static
807 MachineOperatorBuilder::Flags 819 MachineOperatorBuilder::Flags
808 InstructionSelector::SupportedMachineOperatorFlags() { 820 InstructionSelector::SupportedMachineOperatorFlags() {
821 if (IsMipsArchVariant(kMips32r2) || IsMipsArchVariant(kMips32r6)) {
822 return MachineOperatorBuilder::kFloat64Floor |
823 MachineOperatorBuilder::kFloat64Ceil |
824 MachineOperatorBuilder::kFloat64RoundTruncate;
825 }
809 return MachineOperatorBuilder::kNoFlags; 826 return MachineOperatorBuilder::kNoFlags;
810 } 827 }
811 828
812 } // namespace compiler 829 } // namespace compiler
813 } // namespace internal 830 } // namespace internal
814 } // namespace v8 831 } // namespace v8
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