| OLD | NEW |
| 1 /* | 1 /* |
| 2 * XVID MPEG-4 VIDEO CODEC | 2 * XVID MPEG-4 VIDEO CODEC |
| 3 * - MMX and XMM forward discrete cosine transform - | 3 * - MMX and XMM forward discrete cosine transform - |
| 4 * | 4 * |
| 5 * Copyright(C) 2001 Peter Ross <pross@xvid.org> | 5 * Copyright(C) 2001 Peter Ross <pross@xvid.org> |
| 6 * | 6 * |
| 7 * Originally provided by Intel at AP-922 | 7 * Originally provided by Intel at AP-922 |
| 8 * http://developer.intel.com/vtune/cbts/strmsimd/922down.htm | 8 * http://developer.intel.com/vtune/cbts/strmsimd/922down.htm |
| 9 * (See more app notes at http://developer.intel.com/vtune/cbts/strmsimd/appnote
s.htm) | 9 * (See more app notes at http://developer.intel.com/vtune/cbts/strmsimd/appnote
s.htm) |
| 10 * but in a limited edition. | 10 * but in a limited edition. |
| (...skipping 23 matching lines...) Expand all Loading... |
| 34 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | 34 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 35 * Lesser General Public License for more details. | 35 * Lesser General Public License for more details. |
| 36 * | 36 * |
| 37 * You should have received a copy of the GNU Lesser General Public License | 37 * You should have received a copy of the GNU Lesser General Public License |
| 38 * along with FFmpeg; if not, write to the Free Software Foundation, | 38 * along with FFmpeg; if not, write to the Free Software Foundation, |
| 39 * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA | 39 * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA |
| 40 */ | 40 */ |
| 41 | 41 |
| 42 #include <inttypes.h> | 42 #include <inttypes.h> |
| 43 #include "libavcodec/avcodec.h" | 43 #include "libavcodec/avcodec.h" |
| 44 #include "idct_xvid.h" |
| 44 | 45 |
| 45 //============================================================================= | 46 //============================================================================= |
| 46 // Macros and other preprocessor constants | 47 // Macros and other preprocessor constants |
| 47 //============================================================================= | 48 //============================================================================= |
| 48 | 49 |
| 49 #define BITS_INV_ACC 5 // 4 or 5 for IEEE | 50 #define BITS_INV_ACC 5 // 4 or 5 for IEEE |
| 50 #define SHIFT_INV_ROW (16 - BITS_INV_ACC) //11 | 51 #define SHIFT_INV_ROW (16 - BITS_INV_ACC) //11 |
| 51 #define SHIFT_INV_COL (1 + BITS_INV_ACC) //6 | 52 #define SHIFT_INV_COL (1 + BITS_INV_ACC) //6 |
| 52 #define RND_INV_ROW (1024 * (6 - BITS_INV_ACC)) | 53 #define RND_INV_ROW (1024 * (6 - BITS_INV_ACC)) |
| 53 #define RND_INV_COL (16 * (BITS_INV_ACC - 3)) | 54 #define RND_INV_COL (16 * (BITS_INV_ACC - 3)) |
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| 516 DCT_8_INV_ROW_XMM(5*16(%0), 5*16(%0), 64*3(%2), 8*5(%1)) | 517 DCT_8_INV_ROW_XMM(5*16(%0), 5*16(%0), 64*3(%2), 8*5(%1)) |
| 517 DCT_8_INV_ROW_XMM(6*16(%0), 6*16(%0), 64*2(%2), 8*6(%1)) | 518 DCT_8_INV_ROW_XMM(6*16(%0), 6*16(%0), 64*2(%2), 8*6(%1)) |
| 518 DCT_8_INV_ROW_XMM(7*16(%0), 7*16(%0), 64*1(%2), 8*7(%1)) | 519 DCT_8_INV_ROW_XMM(7*16(%0), 7*16(%0), 64*1(%2), 8*7(%1)) |
| 519 | 520 |
| 520 //# Process the columns (4 at a time) | 521 //# Process the columns (4 at a time) |
| 521 DCT_8_INV_COL(0(%0), 0(%0)) | 522 DCT_8_INV_COL(0(%0), 0(%0)) |
| 522 DCT_8_INV_COL(8(%0), 8(%0)) | 523 DCT_8_INV_COL(8(%0), 8(%0)) |
| 523 :: "r"(block), "r"(rounder_0), "r"(tab_i_04_xmm), "r"(tg_1_16)); | 524 :: "r"(block), "r"(rounder_0), "r"(tab_i_04_xmm), "r"(tg_1_16)); |
| 524 } | 525 } |
| 525 | 526 |
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