ffmpeg roll of source to mar 9 version...

patched-ffmpeg-mt/libavcodec/ppc/dsputil_ppc.c

 /*
  * Copyright (c) 2002 Brian Foley
  * Copyright (c) 2002 Dieter Shirley
  * Copyright (c) 2003-2004 Romain Dolbeau <romain@dolbeau.org>
  *
  * This file is part of FFmpeg.
  *
  * FFmpeg is free software; you can redistribute it and/or
  * modify it under the terms of the GNU Lesser General Public
  * License as published by the Free Software Foundation; either
  * version 2.1 of the License, or (at your option) any later version.
  *
  * FFmpeg is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  * Lesser General Public License for more details.
  *
  * You should have received a copy of the GNU Lesser General Public
  * License along with FFmpeg; if not, write to the Free Software
  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
 #include "libavcodec/dsputil.h"
 
 #include "dsputil_ppc.h"
 
 #include "dsputil_altivec.h"
 
-void fdct_altivec(int16_t *block);
-void gmc1_altivec(uint8_t *dst, uint8_t *src, int stride, int h,
-                  int x16, int y16, int rounder);
-void idct_put_altivec(uint8_t *dest, int line_size, int16_t *block);
-void idct_add_altivec(uint8_t *dest, int line_size, int16_t *block);
-
-void ff_vp3_idct_altivec(DCTELEM *block);
-void ff_vp3_idct_put_altivec(uint8_t *dest, int line_size, DCTELEM *block);
-void ff_vp3_idct_add_altivec(uint8_t *dest, int line_size, DCTELEM *block);
-
-void dsputil_h264_init_ppc(DSPContext* c, AVCodecContext *avctx);
-
-void dsputil_init_altivec(DSPContext* c, AVCodecContext *avctx);
-void vc1dsp_init_altivec(DSPContext* c, AVCodecContext *avctx);
-void float_init_altivec(DSPContext* c, AVCodecContext *avctx);
-void int_init_altivec(DSPContext* c, AVCodecContext *avctx);
-
 int mm_flags = 0;
 
 int mm_support(void)
 {
     int result = 0;
 #if HAVE_ALTIVEC
     if (has_altivec()) {
         result |= FF_MM_ALTIVEC;
     }
 #endif /* result */
@@ skipping 70 matching lines @@
 update 24/06/2003 : Apple released yesterday the G5, with a PPC970. cache line
 size: 128 bytes. Oups.
 The semantic of dcbz was changed, it always clear 32 bytes. so the function
 below will work, but will be slow. So I fixed check_dcbz_effect to use dcbzl,
 which is defined to clear a cache line (as dcbz before). So we still can
 distinguish, and use dcbz (32 bytes) or dcbzl (one cache line) as required.
 
 see <http://developer.apple.com/technotes/tn/tn2087.html>
 and <http://developer.apple.com/technotes/tn/tn2086.html>
 */
-void clear_blocks_dcbz32_ppc(DCTELEM *blocks)
+static void clear_blocks_dcbz32_ppc(DCTELEM *blocks)
 {
 POWERPC_PERF_DECLARE(powerpc_clear_blocks_dcbz32, 1);
     register int misal = ((unsigned long)blocks & 0x00000010);
     register int i = 0;
 POWERPC_PERF_START_COUNT(powerpc_clear_blocks_dcbz32, 1);
 #if 1
     if (misal) {
         ((unsigned long*)blocks)[0] = 0L;
         ((unsigned long*)blocks)[1] = 0L;
         ((unsigned long*)blocks)[2] = 0L;
@@ skipping 12 matching lines @@
     }
 #else
     memset(blocks, 0, sizeof(DCTELEM)*6*64);
 #endif
 POWERPC_PERF_STOP_COUNT(powerpc_clear_blocks_dcbz32, 1);
 }
 
 /* same as above, when dcbzl clear a whole 128B cache line
    i.e. the PPC970 aka G5 */
 #if HAVE_DCBZL
-void clear_blocks_dcbz128_ppc(DCTELEM *blocks)
+static void clear_blocks_dcbz128_ppc(DCTELEM *blocks)
 {
 POWERPC_PERF_DECLARE(powerpc_clear_blocks_dcbz128, 1);
     register int misal = ((unsigned long)blocks & 0x0000007f);
     register int i = 0;
 POWERPC_PERF_START_COUNT(powerpc_clear_blocks_dcbz128, 1);
 #if 1
     if (misal) {
         // we could probably also optimize this case,
         // but there's not much point as the machines
         // aren't available yet (2003-06-26)
         memset(blocks, 0, sizeof(DCTELEM)*6*64);
     }
     else
         for ( ; i < sizeof(DCTELEM)*6*64 ; i += 128) {
             __asm__ volatile("dcbzl %0,%1" : : "b" (blocks), "r" (i) : "memory");
         }
 #else
     memset(blocks, 0, sizeof(DCTELEM)*6*64);
 #endif
 POWERPC_PERF_STOP_COUNT(powerpc_clear_blocks_dcbz128, 1);
 }
 #else
-void clear_blocks_dcbz128_ppc(DCTELEM *blocks)
+static void clear_blocks_dcbz128_ppc(DCTELEM *blocks)
 {
     memset(blocks, 0, sizeof(DCTELEM)*6*64);
 }
 #endif
 
 #if HAVE_DCBZL
 /* check dcbz report how many bytes are set to 0 by dcbz */
 /* update 24/06/2003 : replace dcbz by dcbzl to get
    the intended effect (Apple "fixed" dcbz)
    unfortunately this cannot be used unless the assembler
    knows about dcbzl ... */
-long check_dcbzl_effect(void)
+static long check_dcbzl_effect(void)
 {
     register char *fakedata = av_malloc(1024);
     register char *fakedata_middle;
     register long zero = 0;
     register long i = 0;
     long count = 0;
 
     if (!fakedata) {
         return 0L;
     }
 
     fakedata_middle = (fakedata + 512);
 
     memset(fakedata, 0xFF, 1024);
 
     /* below the constraint "b" seems to mean "Address base register"
        in gcc-3.3 / RS/6000 speaks. seems to avoid using r0, so.... */
     __asm__ volatile("dcbzl %0, %1" : : "b" (fakedata_middle), "r" (zero));
 
     for (i = 0; i < 1024 ; i ++) {
         if (fakedata[i] == (char)0)
             count++;
     }
 
     av_free(fakedata);
 
     return count;
 }
 #else
-long check_dcbzl_effect(void)
+static long check_dcbzl_effect(void)
 {
   return 0;
 }
 #endif
 
 static void prefetch_ppc(void *mem, int stride, int h)
 {
     register const uint8_t *p = mem;
     do {
         __asm__ volatile ("dcbt 0,%0" : : "r" (p));
@@ skipping 60 matching lines @@
                     perfdata[j][i][powerpc_data_max] = 0x0000000000000000ULL;
                     perfdata[j][i][powerpc_data_sum] = 0x0000000000000000ULL;
                     perfdata[j][i][powerpc_data_num] = 0x0000000000000000ULL;
                 }
             }
         }
 #endif /* CONFIG_POWERPC_PERF */
     }
 #endif /* HAVE_ALTIVEC */
 }