Process two 32-bit digits as one 64-bit digit in all bigint intrinsics on x64.

runtime/vm/assembler_x64.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // NOLINT
 #if defined(TARGET_ARCH_X64)
 
 #include "vm/assembler.h"
 #include "vm/cpu.h"
 #include "vm/heap.h"
@@ skipping 2031 matching lines @@
 
 
 void Assembler::idivq(Register reg) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitRegisterREX(reg, REX_W);
   EmitUint8(0xF7);
   EmitOperand(7, Operand(reg));
 }
 
 
+void Assembler::divq(Register reg) {
+  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  EmitRegisterREX(reg, REX_W);
+  EmitUint8(0xF7);
+  EmitOperand(6, Operand(reg));
+}
+
+
 void Assembler::imull(Register dst, Register src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   Operand operand(src);
   EmitOperandREX(dst, operand, REX_NONE);
   EmitUint8(0x0F);
   EmitUint8(0xAF);
   EmitOperand(dst & 7, Operand(src));
 }
 
 
@@ skipping 53 matching lines @@
 
 void Assembler::imulq(Register dst, const Address& address) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitOperandREX(dst, address, REX_W);
   EmitUint8(0x0F);
   EmitUint8(0xAF);
   EmitOperand(dst & 7, address);
 }
 
 
+void Assembler::mulq(Register reg) {
+  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  EmitRegisterREX(reg, REX_W);
+  EmitUint8(0xF7);
+  EmitOperand(4, Operand(reg));
+}
+
+
 void Assembler::subq(Register dst, Register src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   Operand operand(src);
   EmitOperandREX(dst, operand, REX_W);
   EmitUint8(0x2B);
   EmitOperand(dst & 7, operand);
 }
 
 
 void Assembler::subq(Register reg, const Immediate& imm) {
@@ skipping 130 matching lines @@
 void Assembler::sarq(Register reg, const Immediate& imm) {
   EmitGenericShift(true, 7, reg, imm);
 }
 
 
 void Assembler::sarq(Register operand, Register shifter) {
   EmitGenericShift(true, 7, operand, shifter);
 }
 
 
+void Assembler::shldq(Register dst, Register src, const Immediate& imm) {
+  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  ASSERT(imm.is_int8());
+  Operand operand(src);
+  EmitOperandREX(dst, operand, REX_W);
+  EmitUint8(0x0F);
+  EmitUint8(0xA4);
+  EmitOperand(src & 7, Operand(dst));
+  EmitUint8(imm.value() & 0xFF);
+}
+
+
 void Assembler::incl(const Address& address) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   Operand operand(address);
   EmitOperandREX(0, operand, REX_NONE);
   EmitUint8(0xFF);
   EmitOperand(0, operand);
 }
 
 
 void Assembler::decl(const Address& address) {
@@ skipping 1614 matching lines @@
 
 
 const char* Assembler::FpuRegisterName(FpuRegister reg) {
   ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters));
   return xmm_reg_names[reg];
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_X64